On Thu, Jan 14, 2016 at 04:24:51PM +0100, Maxime Ripard wrote: > The Allwinner SoCs have a gate controller to gate the access to the DRAM > clock to the some devices that need to access the DRAM directly (mostly > display / image related IPs). > > Use a simple gates driver to support the one found in the A13 / R8 SoCs. > > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> > Acked-by: Chen-Yu Tsai <w...@csie.org> > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
Acked-by: Rob Herring <r...@kernel.org> > drivers/clk/sunxi/clk-simple-gates.c | 2 ++ > 2 files changed, 3 insertions(+) -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
