Good evening everyone We are working to rotate BAT / NAND in a Cubieboard2 with Samsung NAND 316 K9GBG08U0A SCB0
Below show the whole process I am following:
All changed files are attached!
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sunxi-tools
git clone git://github.com/linux-sunxi/sunxi-tools.git
make misc
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U-Boot Denx
git clone git://git.denx.de/u-boot.git -b master u-boot-denx
configs/Cubieboard2_defconfig
CONFIG_SUNXI_NAND=y
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- Cubieboard2_defconfig
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- menuconfig
add NAND
add MTD
.config
follows the attachment
I changed the following files:
######################################
arch/arm/dts/sun7i-a20.dtsi
nand_clk: clk@01c20080 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
reg = <0x01c20080 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
clock-output-names = "nand";
};
nfc: nand@01c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ahb_gates 13>, <&nand_clk>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 3>;
dma-names = "rxtx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
nand_pins_a: nand_base0@0 {
allwinner,pins = "PC0", "PC1", "PC2",
"PC5", "PC8", "PC9", "PC10",
"PC11", "PC12", "PC13",
"PC14",
"PC15", "PC16";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs0_pins_a: nand_cs@0 {
allwinner,pins = "PC4";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs1_pins_a: nand_cs@1 {
allwinner,pins = "PC3";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs2_pins_a: nand_cs@2 {
allwinner,pins = "PC17";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs3_pins_a: nand_cs@3 {
allwinner,pins = "PC18";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs4_pins_a: nand_cs@4 {
allwinner,pins = "PC19";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs5_pins_a: nand_cs@5 {
allwinner,pins = "PC20";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs6_pins_a: nand_cs@6 {
allwinner,pins = "PC21";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_cs7_pins_a: nand_cs@7 {
allwinner,pins = "PC22";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_rb0_pins_a: nand_rb@0 {
allwinner,pins = "PC6";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
nand_rb1_pins_a: nand_rb@1 {
allwinner,pins = "PC7";
allwinner,function = "nand0";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
#################################################################################
arch/arm/dts/sun7i-a20-cubieboard2.dts
&nfc {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
status = "okay";
nand@0 {
#address-cells = <2>;
#size-cells = <2>;
reg = <0>;
allwinner,rb = <0>;
nand-ecc-mode = "hw";
nand-ecc-strength = <40>;
nand-ecc-step-size = <1024>;
nand-rnd-mode = "hw";
nand-randomizer-seeds = /bits/ 16 <
0x2b75 0x0bd0 0x5ca3 0x62d1 0x1c93 0x07e9 0x2162
0x3a72
0x0d67 0x67f9 0x1be7 0x077d 0x032f 0x0dac 0x2716
0x2436
0x7922 0x1510 0x3860 0x5287 0x480f 0x4252 0x1789
0x5a2d
0x2a49 0x5e10 0x437f 0x4b4e 0x2f45 0x216e 0x5cb7
0x7130
0x2a3f 0x60e4 0x4dc9 0x0ef0 0x0f52 0x1bb9 0x6211
0x7a56
0x226d 0x4ea7 0x6f36 0x3692 0x38bf 0x0c62 0x05eb
0x4c55
0x60f4 0x728c 0x3b6f 0x2037 0x7f69 0x0936 0x651a
0x4ceb
0x6218 0x79f3 0x383f 0x18d9 0x4f05 0x5c82 0x2912
0x6f17
0x6856 0x5938 0x1007 0x61ab 0x3e7f 0x57c2 0x542f
0x4f62
0x7454 0x2eac 0x7739 0x42d4 0x2f90 0x435a 0x2e52
0x2064
0x637c 0x66ad 0x2c90 0x0bad 0x759c 0x0029 0x0986
0x7126
0x1ca7 0x1605 0x386a 0x27f5 0x1380 0x6d75 0x24c3
0x0f8e
0x2b7a 0x1418 0x1fd1 0x7dc1 0x2d8e 0x43af 0x2267
0x7da3
0x4e3d 0x1338 0x50db 0x454d 0x764d 0x40a3 0x42e6
0x262b
0x2d2e 0x1aea 0x2e17 0x173d 0x3a6e 0x71bf 0x25f9
0x0a5d
0x7c57 0x0fbe 0x46ce 0x4939 0x6b17 0x37bb 0x3e91
0x76db>;
onfi,nand-timing-mode = <0x1f>;
nand-on-flash-bbt;
boot0@0 {
label = "boot0";
reg = /bits/ 64 <0x0 0x200000>;
nand-ecc-mode = "hw_syndrome";
nand-rnd-mode = "hw";
};
boot0-rescue@200000 {
label = "boot0-rescue";
reg = /bits/ 64 <0x200000 0x200000>;
nand-ecc-mode = "hw_syndrome";
nand-rnd-mode = "hw";
};
uboot@400000 {
label = "uboot";
reg = /bits/ 64 <0x400000 0x200000>;
nand-ecc-mode = "hw";
nand-rnd-mode = "hw";
};
uboot-rescue@600000 {
label = "uboot-rescue";
reg = /bits/ 64 <0x600000 0x200000>;
nand-ecc-mode = "hw";
nand-rnd-mode = "hw";
};
rootfs@800000 {
label = "rootfs";
reg = /bits/ 64 <0x800000 0xff800000>;
nand-ecc-mode = "hw";
nand-rnd-mode = "hw";
};
};
#################################################################################
include/configs/sunxi-common.h
#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
#define CONFIG_SPL_NAND_SUPPORT 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 8
/* Requirements for UBI */
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define MTDIDS_DEFAULT "nand0=sunxi-nand"
#define MTDPARTS_DEFAULT "mtdparts=sunxi-nand:" \
"2m(boot0)ro," \
"2m(boot0-rescue)," \
"2m(uboot)ro," \
"2m(uboot-rescue)," \
"-(rootfs)"
#define CONFIG_CMD_NAND_TRIMFFS
#endif /* CONFIG_NAND_SUNXI */
#ifdef CONFIG_SPL_SPI_SUNXI
#define CONFIG_SPL_SPI_FLASH_SUPPORT 1
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x000000400000
#endif
#################################################################################
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
compiled perfectly
cp -Rf u-boot-denx/arch/arm/dts/sun7i-a20-cubieboard2.dtb
/boot/sun7i-a20-cubieboard2.dtb
#Write U-Boot MMC
dd if=u-boot-sunxi-with-spl.bin of=/dev/mmcblk0 bs=1024 seek=8
673+1 records in
673+1 records out
689765 bytes (690 kB) copied, 0.149096 s, 4.6 MB/s
Reboot new U-boot.
=> nand info
Device 0: nand0, sector size 1024 KiB
Page size 8192 b
OOB size 640 b
Erase size 1048576 b
subpagesize 8192 b
options 0x 1008
bbt options 0x 70000
=> mtdparts
device nand0 <sunxi-nand>, # parts = 5
#: name size offset
mask_flags
0: boot0 0x00200000 0x00000000 1
1: boot0-rescue 0x00200000 0x00200000 0
2: uboot 0x00200000 0x00400000 1
3: uboot-rescue 0x00200000 0x00600000 0
4: rootfs 0xff800000 0x00800000 0
active partition: nand0,0 - (boot0) 0x00200000 @ 0x00000000
defaults:
mtdids : nand0=sunxi-nand
mtdparts:
mtdparts=sunxi-nand:2m(boot0)ro,2m(boot0-rescue),2m(uboot)ro,2m(uboot-rescue),-(rootfs)
=> nand erase.chip
NAND erase.chip: device 0 whole chip
Erasing at 0x0 -- 0% complete.
nand0: MTD Erase failure: -5
nand0: MTD Erase failure: -5
nand0: MTD Erase failure: -5
nand0: MTD Erase failure: -5
Erasing at 0x38500000 -- 22% complete.
nand0: MTD Erase failure: -5
Skipping bad block at 0xffc00000
Skipping bad block at 0xffd00000
Skipping bad block at 0xffe00000
Skipping bad block at 0xfff00000
OK
=> nand scrub.chip -y
NAND scrub.chip: device 0 whole chip
Erasing at 0x0 -- 0% complete.
nand0: MTD Erase failure: -5
nand0: MTD Erase failure: -5
nand0: MTD Erase failure: -5
nand0: MTD Erase failure: -5
Erasing at 0x38500000 -- 22% complete.
nand0: MTD Erase failure: -5
Erasing at 0xfff00000 -- 100% complete.
OK
=> reset
## Loading init Ramdisk from Legacy Image at 42000000 ...
Image Name: Cubieboard2 UBIFS Ramdisk
Image Type: ARM Linux RAMDisk Image (uncompressed)
Data Size: 5215854 Bytes = 5 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 49000000
Booting using the fdt blob at 0x49000000
Loading Ramdisk to 49b06000, end 49fff66e ... OK
Using Device Tree in place at 49000000, end 4900acdc
[ 6.097892] nand: device found, Manufacturer ID: 0xec, Chip ID: 0xd7
[ 6.104289] nand: Samsung NAND 4GiB 3,3V 8-bit
[ 6.108869] nand: 4096 MiB, MLC, erase size: 1024 KiB, page size: 8192,
OOB size: 640
[ 6.121345] Bad block table found at page 524160, version 0x01
[ 6.133247] Bad block table found at page 524032, version 0x01
[ 6.162963] 5 ofpart partitions found on MTD device 1c03000.nand
[ 6.169164] Creating 5 MTD partitions on "1c03000.nand":
[ 6.174533] 0x000000000000-0x000000200000 : "boot0"
[ 6.182224] 0x000000200000-0x000000400000 : "boot0-rescue"
[ 6.191851] 0x000000400000-0x000000600000 : "uboot"
[ 6.198265] 0x000000600000-0x000000800000 : "uboot-rescue"
[ 6.205142] 0x000000800000-0x000100000000 : "rootfs"
Begin: Loading essential drivers ... done.
#mtdinfo -a
Count of MTD devices: 5
Present MTD devices: mtd0, mtd1, mtd2, mtd3, mtd4
Sysfs interface supported: yes
mtd0
Name: boot0
Type: mlc-nand
Eraseblock size: 1048576 bytes, 1024.0 KiB
Amount of eraseblocks: 2 (2097152 bytes, 2.0 MiB)
Minimum input/output unit size: 8192 bytes
Sub-page size: 8192 bytes
OOB size: 640 bytes
Character device major/minor: 90:0
Bad blocks are allowed: true
Device is writable: true
mtd1
Name: boot0-rescue
Type: mlc-nand
Eraseblock size: 1048576 bytes, 1024.0 KiB
Amount of eraseblocks: 2 (2097152 bytes, 2.0 MiB)
Minimum input/output unit size: 8192 bytes
Sub-page size: 8192 bytes
OOB size: 640 bytes
Character device major/minor: 90:2
Bad blocks are allowed: true
Device is writable: true
mtd2
Name: uboot
Type: mlc-nand
Eraseblock size: 1048576 bytes, 1024.0 KiB
Amount of eraseblocks: 2 (2097152 bytes, 2.0 MiB)
Minimum input/output unit size: 8192 bytes
Sub-page size: 8192 bytes
OOB size: 640 bytes
Character device major/minor: 90:4
Bad blocks are allowed: true
Device is writable: true
mtd3
Name: uboot-rescue
Type: mlc-nand
Eraseblock size: 1048576 bytes, 1024.0 KiB
Amount of eraseblocks: 2 (2097152 bytes, 2.0 MiB)
Minimum input/output unit size: 8192 bytes
Sub-page size: 8192 bytes
OOB size: 640 bytes
Character device major/minor: 90:6
Bad blocks are allowed: true
Device is writable: true
mtd4
Name: rootfs
Type: mlc-nand
Eraseblock size: 1048576 bytes, 1024.0 KiB
Amount of eraseblocks: 4088 (4286578688 bytes, 4.0 GiB)
Minimum input/output unit size: 8192 bytes
Sub-page size: 8192 bytes
OOB size: 640 bytes
Character device major/minor: 90:8
Bad blocks are allowed: true
Device is writable: true
###########FLASH_ERASE##############
###flash_erase /dev/mtd0 0 0
Erasing 1024 Kibyte @ 100000 -- 100 % complete
###flash_erase /dev/mtd1 0 0
Erasing 1024 Kibyte @ 100000 -- 100 % complete
###flash_erase /dev/mtd2 0 0
Erasing 1024 Kibyte @ 0 -- 0 % complete libmtd: error!: MEMERASE64 ioctl
failed for eraseblock 0 (mtd2)
error 5 (Input/output error)
flash_erase: error!: /dev/mtd2: MTD Erase failure
error 5 (Input/output error)
Erasing 1024 Kibyte @ 100000 -- 50 % complete libmtd: error!: MEMERASE64
ioctl failed for eraseblock 1 (mtd2)
error 5 (Input/output error)
flash_erase: error!: /dev/mtd2: MTD Erase failure
error 5 (Input/output error)
Erasing 1024 Kibyte @ 100000 -- 100 % complete
###flash_erase /dev/mtd3 0 0
Erasing 1024 Kibyte @ 100000 -- 100 % complete
###flash_erase /dev/mtd4 0 0
Erasing 1024 Kibyte @ 800000 -- 0 % complete libmtd: error!: MEMERASE64
ioctl failed for eraseblock 8 (mtd4)
error 5 (Input/output error)
flash_erase: error!: /dev/mtd4: MTD Erase failure
error 5 (Input/output error)
Erasing 1024 Kibyte @ 900000 -- 0 % complete libmtd: error!: MEMERASE64
ioctl failed for eraseblock 9 (mtd4)
error 5 (Input/output error)
flash_erase: error!: /dev/mtd4: MTD Erase failure
error 5 (Input/output error)
Erasing 1024 Kibyte @ 38e00000 -- 22 % complete libmtd: error!: MEMERASE64
ioctl failed for eraseblock 910 (mtd4)
error 5 (Input/output error)
flash_erase: error!: /dev/mtd4: MTD Erase failure
error 5 (Input/output error)
Erasing 1024 Kibyte @ ff300000 -- 99 % complete flash_erase: Skipping bad
block at ff400000
flash_erase: Skipping bad block at ff500000
flash_erase: Skipping bad block at ff600000
flash_erase: Skipping bad block at ff700000
Erasing 1024 Kibyte @ ff700000 -- 100 % complete
###cd u-boot-denx
###cd spl
###../../sunxi-tools/sunxi-nand-image-builder -p 8192 -o 640 -e 0x100000 -b
-u 4096 -c 64/1024 sunxi-spl.bin boot0.bin
###nandwrite -o -n /dev/mtd0 boot0.bin
Writing data to block 0 at offset 0x0
###nandwrite -o -n /dev/mtd1 boot0.bin
Writing data to block 0 at offset 0x0
###cd ..
###nandwrite -p /dev/mtd2 u-boot-dtb.bin
Writing data to block 0 at offset 0x0
### nandwrite -p /dev/mtd3 u-boot-dtb.bin
Writing data to block 0 at offset 0x0
### ubiformat /dev/mtd4 -y
ubiformat: mtd4 (mlc-nand), size 4286578688 bytes (4.0 GiB), 4088
eraseblocks of 1048576 bytes (1024.0 KiB), min. I/O size 8192 bytes
libscan: scanning eraseblock 4087 -- 100 % complete
ubiformat: 4081 eraseblocks have valid erase counter, mean value is 0
ubiformat: 7 bad eraseblocks found, numbers: 8, 9, 910, 4084, 4085, 4086,
4087
ubiformat: formatting eraseblock 4087 -- 100 % complete
###reboot
Shot MMC card and:?
U-Boot SPL 2016.09-rc1-00514-gc98b171-dirty (Aug 21 2016 - 18:28:33)
DRAM: 1024 MiB
CPU: 912000000Hz, AXI/AHB/APB: 3/2/2
Trying to boot from NAND
### ERROR ### Please RESET the board ###
Someone would have a repository there date with all applied u-boot patch
where can I test there?
Boris, Hans has a repository where could this auditioning
if you could pass the test for the purpose cubieboard2
I saw several reports of people who managed to boot but not with cubieboard2
Talves is forgetting something or even going wrong parameters so would like
a reliable repository of for NAND / BAT Samsung Sun7i
Thank you very much in advance!
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sun7i-a20.dtsi
Description: Binary data
sun7i-a20-cubieboard2.dts
Description: Binary data
/* * (C) Copyright 2012-2012 Henrik Nordstrom <[email protected]> * * (C) Copyright 2007-2011 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> * Tom Cubie <[email protected]> * * Configuration settings for the Allwinner sunxi series of boards. * * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _SUNXI_COMMON_CONFIG_H #define _SUNXI_COMMON_CONFIG_H #include <asm/arch/cpu.h> #include <linux/stringify.h> #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT /* * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the * expense of restricting some features, so the regular machine id values can * be used. */ # define CONFIG_MACH_TYPE_COMPAT_REV 0 #else /* * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass * beyond the machine id check. */ # define CONFIG_MACH_TYPE_COMPAT_REV 1 #endif /* * High Level Configuration Options */ #define CONFIG_SUNXI /* sunxi family */ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ #endif /* Serial & console */ #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ #define CONFIG_SYS_NS16550_CLK 24000000 #ifndef CONFIG_DM_SERIAL # define CONFIG_SYS_NS16550_REG_SIZE -4 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE #endif /* CPU */ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_TIMER_CLK_FREQ 24000000 /* * The DRAM Base differs between some models. We cannot use macros for the * CONFIG_FOO defines which contain the DRAM base address since they end * up unexpanded in include/autoconf.mk . * * So we have to have this #ifdef #else #endif block for these. */ #ifdef CONFIG_MACH_SUN9I #define SDRAM_OFFSET(x) 0x2##x #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ #define CONFIG_SYS_TEXT_BASE 0x2a000000 #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 #else #define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ #define CONFIG_SYS_TEXT_BASE 0x4a000000 #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #endif #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) /* * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is * slightly bigger. Note that it is possible to map the first 32 KiB of the * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. */ #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 #define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */ #else #define CONFIG_SYS_INIT_RAM_ADDR 0x0 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ #endif #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ #ifdef CONFIG_AHCI #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SUNXI_AHCI #define CONFIG_SYS_64BIT_LBA #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) #define CONFIG_SCSI #endif #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG #define CONFIG_SERIAL_TAG #ifdef CONFIG_NAND_SUNXI #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 #define CONFIG_SPL_NAND_SUPPORT 1 #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 8 /* Requirements for UBI */ #define CONFIG_RBTREE #define CONFIG_LZO #define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_MTD_PARTITIONS #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define MTDIDS_DEFAULT "nand0=sunxi-nand" #define MTDPARTS_DEFAULT "mtdparts=sunxi-nand:" \ "2m(boot0)ro," \ "2m(boot0-rescue)," \ "2m(uboot)ro," \ "2m(uboot-rescue)," \ "-(rootfs)" #define CONFIG_CMD_NAND_TRIMFFS #endif /* CONFIG_NAND_SUNXI */ #ifdef CONFIG_SPL_SPI_SUNXI #define CONFIG_SPL_SPI_FLASH_SUPPORT 1 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x000000400000 #endif /* mmc config */ #ifdef CONFIG_MMC #define CONFIG_GENERIC_MMC #define CONFIG_MMC_SUNXI #define CONFIG_MMC_SUNXI_SLOT 0 #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ #endif /* 64MB of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) /* * Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* standalone support */ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR /* baudrate */ #define CONFIG_BAUDRATE 115200 /* The stack sizes are set up in start.S using the settings below */ #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ #define CONFIG_IDENT_STRING " Allwinner Technology" #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ #define CONFIG_FAT_WRITE /* enable write access */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_BOARD_LOAD_IMAGE #if defined(CONFIG_MACH_SUN9I) #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */ #elif defined(CONFIG_MACH_SUN50I) #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */ #else #define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */ #endif #define CONFIG_SPL_LIBDISK_SUPPORT #ifdef CONFIG_MMC #define CONFIG_SPL_MMC_SUPPORT #endif #ifndef CONFIG_ARM64 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" #endif #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) #define LOW_LEVEL_SRAM_STACK 0x0001A000 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #else /* end of 32 KiB in sram */ #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #endif /* I2C */ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ defined CONFIG_SY8106A_POWER #define CONFIG_SPL_I2C_SUPPORT #endif #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x7f #endif #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) #define CONFIG_SYS_I2C_SOFT #define CONFIG_SYS_I2C_SOFT_SPEED 50000 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 /* We use pin names in Kconfig and sunxi_name_to_gpio() */ #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl #ifndef __ASSEMBLY__ extern int soft_i2c_gpio_sda; extern int soft_i2c_gpio_scl; #endif #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ #else #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ #endif /* PMU */ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ defined CONFIG_SY8106A_POWER #define CONFIG_SPL_POWER_SUPPORT #endif #ifndef CONFIG_CONS_INDEX #define CONFIG_CONS_INDEX 1 /* UART0 */ #endif #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE #if CONFIG_CONS_INDEX == 1 #ifdef CONFIG_MACH_SUN9I #define OF_STDOUT_PATH "/soc/serial@07000000:115200" #else #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" #endif #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" #else #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. #endif #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ /* GPIO */ #define CONFIG_SUNXI_GPIO #define CONFIG_SPL_GPIO_SUPPORT #ifdef CONFIG_VIDEO /* * The amount of RAM to keep free at the top of RAM when relocating u-boot, * to use as framebuffer. This must be a multiple of 4096. */ #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) /* Do we want to initialize a simple FB? */ #define CONFIG_VIDEO_DT_SIMPLEFB #define CONFIG_VIDEO_SUNXI #define CONFIG_CFB_CONSOLE #define CONFIG_VIDEO_SW_CURSOR #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_STD_TIMINGS #define CONFIG_I2C_EDID #define VIDEO_LINE_LEN (pGD->plnSizeX) /* allow both serial and cfb console. */ #define CONFIG_CONSOLE_MUX /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ #define CONFIG_VGA_AS_SINGLE_DEVICE #endif /* CONFIG_VIDEO */ /* Ethernet support */ #ifdef CONFIG_SUNXI_EMAC #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ #define CONFIG_PHYLIB #endif #ifdef CONFIG_SUNXI_GMAC #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ #define CONFIG_PHY_REALTEK #endif #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_USB_OHCI_NEW #define CONFIG_USB_OHCI_SUNXI #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 #endif #ifdef CONFIG_USB_MUSB_SUNXI #define CONFIG_USB_MUSB_PIO_ONLY #endif #ifdef CONFIG_USB_MUSB_GADGET #define CONFIG_USB_FUNCTION_DFU #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_USB_FUNCTION_MASS_STORAGE #endif #ifdef CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_RAM #endif #ifdef CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_FASTBOOT_FLASH #ifdef CONFIG_MMC #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 #define CONFIG_EFI_PARTITION #endif #endif #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE #endif #ifdef CONFIG_USB_KEYBOARD #define CONFIG_CONSOLE_MUX #define CONFIG_PREBOOT #define CONFIG_SYS_STDIO_DEREGISTER #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE #endif #if !defined CONFIG_ENV_IS_IN_MMC && \ !defined CONFIG_ENV_IS_IN_NAND && \ !defined CONFIG_ENV_IS_IN_FAT && \ !defined CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_IS_NOWHERE #endif #define CONFIG_MISC_INIT_R #define CONFIG_SYS_CONSOLE_IS_IN_ENV #ifndef CONFIG_SPL_BUILD #include <config_distro_defaults.h> /* Enable pre-console buffer to get complete log on the VGA console */ #define CONFIG_PRE_CONSOLE_BUFFER #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ #ifdef CONFIG_ARM64 /* * Boards seem to come with at least 512MB of DRAM. * The kernel should go at 512K, which is the default text offset (that will * be adjusted at runtime if needed). * There is no compression for arm64 kernels (yet), so leave some space * for really big kernels, say 256MB for now. * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. * Align the initrd to a 2MB page. */ #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) #else /* * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, * 1M script, 1M pxe and the ramdisk at the end. */ #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) #endif #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0xa000000\0" \ "kernel_addr_r=" KERNEL_ADDR_R "\0" \ "fdt_addr_r=" FDT_ADDR_R "\0" \ "scriptaddr=" SCRIPT_ADDR_R "\0" \ "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" #define DFU_ALT_INFO_RAM \ "dfu_alt_info_ram=" \ "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ "fdt ram " FDT_ADDR_R " 0x100000;" \ "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" #ifdef CONFIG_MMC #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) #else #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) #endif #else #define BOOT_TARGET_DEVICES_MMC(func) #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) #endif #ifdef CONFIG_AHCI #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) #else #define BOOT_TARGET_DEVICES_SCSI(func) #endif #ifdef CONFIG_USB_STORAGE #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) #else #define BOOT_TARGET_DEVICES_USB(func) #endif /* FEL boot support, auto-execute boot.scr if a script address was provided */ #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ "bootcmd_fel=" \ "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ "echo '(FEL boot)'; " \ "source ${fel_scriptaddr}; " \ "fi\0" #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ "fel " #define BOOT_TARGET_DEVICES(func) \ func(FEL, fel, na) \ BOOT_TARGET_DEVICES_MMC(func) \ BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ BOOT_TARGET_DEVICES_SCSI(func) \ BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT #define BOOTCMD_SUNXI_COMPAT \ "bootcmd_sunxi_compat=" \ "setenv root /dev/mmcblk0p3 rootwait; " \ "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ "echo Loaded environment from uEnv.txt; " \ "env import -t 0x44000000 ${filesize}; " \ "fi; " \ "setenv bootargs console=${console} root=${root} ${extraargs}; " \ "ext2load mmc 0 0x43000000 script.bin && " \ "ext2load mmc 0 0x48000000 uImage && " \ "bootm 0x48000000\0" #else #define BOOTCMD_SUNXI_COMPAT #endif #include <config_distro_bootcmd.h> #ifdef CONFIG_USB_KEYBOARD #define CONSOLE_STDIN_SETTINGS \ "preboot=usb start\0" \ "stdin=serial,usbkbd\0" #else #define CONSOLE_STDIN_SETTINGS \ "stdin=serial\0" #endif #ifdef CONFIG_VIDEO #define CONSOLE_STDOUT_SETTINGS \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" #else #define CONSOLE_STDOUT_SETTINGS \ "stdout=serial\0" \ "stderr=serial\0" #endif #define CONSOLE_ENV_SETTINGS \ CONSOLE_STDIN_SETTINGS \ CONSOLE_STDOUT_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ DFU_ALT_INFO_RAM \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "console=ttyS0,115200\0" \ BOOTCMD_SUNXI_COMPAT \ BOOTENV #else /* ifndef CONFIG_SPL_BUILD */ #define CONFIG_EXTRA_ENV_SETTINGS #endif #endif /* _SUNXI_COMMON_CONFIG_H */
u-boot.config
Description: Binary data
