Hello everybody, during the mainlining discussion in the Olimex blog at https://olimex.wordpress.com/2016/08/30/free-electrons-add-mainline-linux-kernel-support-for-the-a13-allwinner-vpu/#comments the topic of A33 SPI support came up. Chen-Yu and Siarhei have pointed out that the chances are good that the A33 can work with the already existing SPI drivers and that simply nobody has taken a look at those in the context of the A33 yet - so I have taken that as an inspiration to take a look :-).
>From the description in the docs published by Allwinner, the A23/A33 SPI controller is clearly derived from the one in the A31, but it is not completely identical. The biggest difference is that the RX and TX FIFOs on the A23/A33 are only 64 Bytes deep while they are 128 Bytes deep on the A31. Documentation source: Page 463 of the A33 manual: https://github.com/allwinner-zh/documents/raw/master/A33/A33%20user%20manual%20release%201.1.pdf Page 889 of the A31 manual: https://github.com/allwinner-zh/documents/raw/master/A31/A31_User_Manual_v1.3_20150510.pdf The current spi-sun6i driver hardcodes the FIFO depth to 128 Bytes, so that needs to be changed depending on the SoC type. Another difference is an additional configuration option influencing the signal sampling on the A23/A33. This is handled by bit 13 of the SPI_INTCTL register. The description states: "Master Sample Data Mode 1-Normal Sample Mode 0-Delay Sample Mode In Normal Sample Mode,SPI Master samples the data at the correct edge for each SPI mode. In Delay Sample Mode,SPI master samples data at the edge that is half cycle delayed by the correct edge defined in respective SPI mode." The manual states that "Delay Sample Mode" is the default, which sounds a bit strange to me. Can somebody with a deeper knowledge of SPI comment on that? There are some additional test modes on the A23/33 compared to the A31, but those should be irrelevant for normal operations. Following are two RFC patches based on Maxime Ripard's sunxi/for-next branch at https://git.kernel.org/cgit/linux/kernel/git/mripard/linux.git/log/?h=sunxi/for-next that modify the spi-sun6i driver to handle different FIFO depths and add the relevant nodes (clock, pinctrl, spi0 controller) to the A23/A33 dtsi files. Please note that this is largely untested as I currently don't have any A23/A33 hardware (an A33 board is on the way to me but will probably take some time to arrive). All I can say at the moment is that the code compiles. I would apprechiate very much if people could take a look at it and provide feedback, and if somebody has appropriate hardware, I would welcome very much if you could subject the code to some practical tests. Btw, while checking the docs I have stumbled over one thing that strikes me as rather strange: the A23/A33 has two SPI controllers (SPI0 and SPI1), but there is no documented pinmux that makes SPI1 available on any pins, so SPI1 appears to be completely useless? Regards, Karsten Karsten Merker (2): spi: sunxi: Add Allwinner A23/A33 support to spi-sun6i ARM: dts: sun8i: Add SPI support to the Allwinner A23/A33 dtsi. .../devicetree/bindings/spi/spi-sun6i.txt | 6 ++- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 38 +++++++++++++++++++ arch/arm/boot/dts/sun8i-a23.dtsi | 12 ++++++ arch/arm/boot/dts/sun8i-a33.dtsi | 12 ++++++ drivers/spi/spi-sun6i.c | 43 +++++++++++++++++++--- 5 files changed, 103 insertions(+), 8 deletions(-) -- 2.1.4 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
