Hi,
The plan:
1) erase && replace the bootloader with a custom one on a H3 SoC (much
simpler/faster/secure and fitting the need perfectly)
2) create a custom small OS, replacing the AMP default behavior with a SMP one:
basically matching the address spaces between cpus and just send the other
cores some work to do from cpu0 ( they won't have an operating system and
basically wait for CPU0 events -> hence the new bootloader as well).
Questions:
1) H3 datasheet: are all the registers there or are there some undocumented
ones? (to burn the new bootloader, that is critical)
2) CPU IPIs: we have a msgbox on this platform according to the datasheet. But
how do you send a message from CPU0 to CPU3 or CPU2 to CPU1, without
interrupting the unconcerned cpus (respectively {CPU1,CPU2} and {CPU0,CPU3} )?
Because the datasheet talks about user0 and user1 but no cpuIDs are involved
and it is not clear to me.
Thanks a lot guys
--
Mark
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