Hi Maxime,
Here are 3 more clk fixes. The first one is needed for the second.
The third is a TODO I spotted while doing the first two.
ChenYu
Chen-Yu Tsai (3):
clk: sunxi-ng: mult: Support PLL lock detection
clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier
clocks
clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor
drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 18 ++++++----
drivers/clk/sunxi-ng/ccu-sun9i-a80.c | 70 ++++++++++++++++++++++++++----------
drivers/clk/sunxi-ng/ccu_mult.c | 2 ++
drivers/clk/sunxi-ng/ccu_mult.h | 2 ++
4 files changed, 67 insertions(+), 25 deletions(-)
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2.11.0
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