Hi,
While creating the boot configuration (CCU registers) for a Allwinner H3 board, relying on a Cortex a7 quad, came the question of the cpu frequency scale.
The reference clock frequency is 24MHz.
u-boot has the following code
static struct {
u32 pll1_cfg;
unsigned int freq;
} pll1_para[] = {
/* This array must be ordered by frequency. */
{ PLL1_CFG(31, 1, 0, 0), 1488000000},
{ PLL1_CFG(30, 1, 0, 0), 1440000000},
{ PLL1_CFG(29, 1, 0, 0), 1392000000},
{ PLL1_CFG(28, 1, 0, 0), 1344000000},
{ PLL1_CFG(27, 1, 0, 0), 1296000000},
{ PLL1_CFG(26, 1, 0, 0), 1248000000},
{ PLL1_CFG(25, 1, 0, 0), 1200000000},
{ PLL1_CFG(24, 1, 0, 0), 1152000000},
{ PLL1_CFG(23, 1, 0, 0), 1104000000},
{ PLL1_CFG(22, 1, 0, 0), 1056000000},
{ PLL1_CFG(21, 1, 0, 0), 1008000000},
{ PLL1_CFG(20, 1, 0, 0), 960000000 },
{ PLL1_CFG(19, 1, 0, 0), 912000000 },
{ PLL1_CFG(16, 1, 0, 0), 768000000 },
/* Final catchall entry 384MHz*/
{ PLL1_CFG(16, 0, 0, 0), 0 },
};
We can see that we have a lot of working values for our cpu freq.
PLL for the CPU is given as:
[code](24MHz * N * K) / (M * P) [/code]
If I want a cpu running at 960MHz (severe downclock for power saving reasons), I can use
[code](24 * 20 * 2) / (1 * 1) = 960[/code]
or
[code]N * (24 << K) = 20 * (24 << 1) = 960.[/code]
NOW, with 0<= N <=31 and 0<= K <= 4 (legal values according to the reference manual), I could also have
[code](24 * 10 * 4) / (1 * 1) = 960[/code]
or
[code]10 *(24<<2) =960 [/code]
Can someone tell me the difference between those two strategies at the cpu/board level? Are there known unstable values?
I mean, we get the same frequency result, but with different parameters. Any difference at the consumption level? Will it catch me later?
Thanks
--
Mark --
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