Some SoCs do not support clk delays for MMC in the clock control unit.
These include the old controllers in A10/A10s/A13/R8, and the new eMMC
controller in A64. The config structure for these controllers do not
specify clk_delays, but the check for this was replaced in commit
b0600daebf31 ("mmc: sunxi: Support controllers that can use both old
and new timings").

This patch adds back the check for clk_delays, and also adds comments
for both checks in sunxi_mmc_clk_set_phase().

Fixes: b0600daebf31 ("mmc: sunxi: Support controllers that can use
                      both old and new timings")
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
This fixes an mmc regression on A10/A10s/A13/R8 and A64 introduced
by the A83T mmc patches.

v1 was inlined in a reply to "mmc: sunxi: fix new timings mode on A64
EMMC (MMC2) controller"

Changes since v1:

  - Polished comments 

I've tested this on my A10 Cubieboard and A20 Cubieboard2.
---
 drivers/mmc/host/sunxi-mmc.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 3777517982dd..9dc6d726ec49 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -722,9 +722,14 @@ static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host 
*host,
 {
        int index;
 
+       /* clk controller delays not used under new timings mode */
        if (host->use_new_timings)
                return 0;
 
+       /* some old controllers don't support delays */
+       if (!host->cfg->clk_delays)
+               return 0;
+
        /* determine delays */
        if (rate <= 400000) {
                index = SDXC_CLK_400K;
-- 
2.13.3

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