On 13.02.2018 03:59, Chen-Yu Tsai wrote:
On Tue, Feb 13, 2018 at 9:25 AM, Philipp Rossak <embe...@gmail.com> wrote:
On 12.02.2018 19:21, Philipp Rossak wrote:
When I try to boot my A31s (Bananapi M2) u-boot is showing only Starting
kernel ... . After enabling the earlyprintk I could capture this log: .
After reverting those 5 commits from Chen-Yu I was able to boot again:
clk: sunxi-ng: Support fixed post-dividers on NM style clocks
clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL
clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL
clk: sunxi-ng: Support fixed post-dividers on MP style clocks
clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks
I allready tried to fix it with making them save against zero:
if (cmp->common.features & CCU_FEATURE_FIXED_POSTDIV && \
rate *= cmp->fixed_post_div;
But that didn't help.
It took me some time, but I have now a few more infos:
Right now the code breaks at this point here , with this clock .
If we have a look now at the clock config , we see here a table which is
an u8 array and also a fixed_predivs struct.
The u8 array is for mapping the parents from the index in the parents
array to the actual register value you listed below.
How are you figuring out which clock is triggering this? Because that
is not even the right type of clock. The backtrace you posted shows
the error occurring in a DIV or M type clock, not the MP type you
are pointing to.
Could you add some noisy printk calls to the sunxi_ccu_probe()
function in drivers/clk/sunxi-ng/ccu_common.c so it's much clearer
which clock is failing?
Thats what I basically did to find out which clock is failing. This here
are the changes I'm doing  and thats the dirty log . It fails at
clock NR 155 which is this one  mentioned before.
If we have a look at the function call where it breaks , shouldn't the
table be a clk_div_table struct instead of an u8?
The table argument is an option. Did you go through how the sunxi-ng driver
calls this function? As mentioned above, you are looking at the wrong thing.
I followed the failing call to this function (through the clock driver).
As you can see I added an additional printk statement to see where it fails.
The a31s is the only board where we have this combination of a fixed_predivs
and a table.
Related Clock source register A31s:
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