On Tue, Sep 04, 2018 at 12:40:49PM +0800, Icenowy Zheng wrote: > From: Jagan Teki <[email protected]> > > Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent. > > Include the macro on dt-bindings so-that the same can be used > while defining CCU clock phandles. > > Signed-off-by: Jagan Teki <[email protected]> > Reviewed-by: Rob Herring <[email protected]> > Signed-off-by: Icenowy Zheng <[email protected]>
Applied, thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
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