Hello,
Can someone tell me what's the purpose of TCON0_IO_POL_REG, when TCON is
working in LVDS mode?
(found in A20 User manual, page 422)
I can see from drivers/gpu/drm/sun4i/sun4i_tcon.c file that IO0 and IO1
as HSYNC and VSYNC in RGB mode. But why in LVDS mode
these bits (23 and 24) are set?
Best regards,
Stefan Mavrodiev
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