I don't know if somebody has to sign this off, but here it goes...
sun8i-r40.dtsi add spi nodes, add spidev to sun8i-r40-bananapi-m2-ultra.dts
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index c39b9169ea64..3cad93230237 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -53,7 +53,8 @@
aliases {
ethernet0 = &gmac;
serial0 = &uart0;
- };
+ spi0 = &spi0;
+};
chosen {
stdout-path = "serial0:115200n8";
@@ -117,6 +118,25 @@
status = "okay";
};
+
+&spi0 {
+ status = "okay";
+
+spidev@0x00 {
+ compatible = "spidev";
+ spi-max-frequency = <1200000>;
+ reg = <0>;
+ };
+
+};
+
+
+};
+
+
+
+
+
&gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
@@ -172,7 +192,7 @@
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
- status = "okay";
+ status = "disabled";
};
&mmc2 {
@@ -180,7 +200,7 @@
vqmmc-supply = <®_dcdc1>;
bus-width = <8>;
non-removable;
- status = "okay";
+ status = "disabled";
};
&ohci1 {
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 5f547c161baf..bde6eb2fdabb 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -177,6 +177,14 @@
reg = <0x01c00030 0x0c>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
+ dma: dma-controller@1c02000 {
+ compatible = "allwinner,sun8i-h3-dma";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ };
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun8i-r40-mmc",
@@ -377,6 +385,17 @@
pins = "PB22", "PB23";
function = "uart0";
};
+
+ spi0_pins: spi0-pins {
+ pins = "PC0", "PC1", "PC2", "PC23";
+ function = "spi0";
+ };
+
+ spi1_pins: spi1-pins {
+ pins = "PI18", "PI19", "PI17", "PI16";
+ function = "spi1";
+ };
+
};
wdt: watchdog@1c20c90 {
@@ -529,6 +548,40 @@
#size-cells = <0>;
};
+ spi0: spi@1c05000 {
+ compatible = "allwinner,sun8i-h3-spi" ;
+ reg = <0x01c05000 0x1000>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 24>, <&dma 24>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+
+ spi1: spi@1c06000 {
+ compatible = "allwinner,sun8i-h3-spi" ;
+ reg = <0x01c05000 0x1000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 25>,<&dma 25>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ resets = <&ccu RST_BUS_SPI1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+
gmac: ethernet@1c50000 {
compatible = "allwinner,sun8i-r40-gmac";
syscon = <&ccu>;
--
The more you know, the less you do.
-me
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diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index c39b9169ea64..3cad93230237 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -53,7 +53,8 @@
aliases {
ethernet0 = &gmac;
serial0 = &uart0;
- };
+ spi0 = &spi0;
+};
chosen {
stdout-path = "serial0:115200n8";
@@ -117,6 +118,25 @@
status = "okay";
};
+
+&spi0 {
+ status = "okay";
+
+spidev@0x00 {
+ compatible = "spidev";
+ spi-max-frequency = <1200000>;
+ reg = <0>;
+ };
+
+};
+
+
+};
+
+
+
+
+
&gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
@@ -172,7 +192,7 @@
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
- status = "okay";
+ status = "disabled";
};
&mmc2 {
@@ -180,7 +200,7 @@
vqmmc-supply = <®_dcdc1>;
bus-width = <8>;
non-removable;
- status = "okay";
+ status = "disabled";
};
&ohci1 {
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 5f547c161baf..bde6eb2fdabb 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -177,6 +177,14 @@
reg = <0x01c00030 0x0c>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
+ dma: dma-controller@1c02000 {
+ compatible = "allwinner,sun8i-h3-dma";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ };
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun8i-r40-mmc",
@@ -377,6 +385,17 @@
pins = "PB22", "PB23";
function = "uart0";
};
+
+ spi0_pins: spi0-pins {
+ pins = "PC0", "PC1", "PC2", "PC23";
+ function = "spi0";
+ };
+
+ spi1_pins: spi1-pins {
+ pins = "PI18", "PI19", "PI17", "PI16";
+ function = "spi1";
+ };
+
};
wdt: watchdog@1c20c90 {
@@ -529,6 +548,40 @@
#size-cells = <0>;
};
+ spi0: spi@1c05000 {
+ compatible = "allwinner,sun8i-h3-spi" ;
+ reg = <0x01c05000 0x1000>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 24>, <&dma 24>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+
+ spi1: spi@1c06000 {
+ compatible = "allwinner,sun8i-h3-spi" ;
+ reg = <0x01c05000 0x1000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 25>,<&dma 25>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ resets = <&ccu RST_BUS_SPI1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+
gmac: ethernet@1c50000 {
compatible = "allwinner,sun8i-r40-gmac";
syscon = <&ccu>;
