Marc Dietrich wrote at Wednesday, August 10, 2011 11:22 AM: > These clocks are required for usb operation. pll_p_out4 needs to be set > to 24 MHz. The other clocks default to "off" in order to save some energy. > > Signed-off-by: Marc Dietrich <[email protected]>
Acked-by: Stephen Warren <[email protected]> Given the rest of the thread, this is fine for now. We can address any deficiencies in the bus clock and clk_m parenting when it's addressed globally for all boards later. > diff --git a/arch/arm/mach-tegra/board-paz00.c > b/arch/arm/mach-tegra/board-paz00.c > index 45111f6..cde36dc 100644 > --- a/arch/arm/mach-tegra/board-paz00.c > +++ b/arch/arm/mach-tegra/board-paz00.c > @@ -145,6 +145,12 @@ static __initdata struct tegra_clk_init_table > paz00_clk_init_table[] = { > /* name parent rate enabled */ > { "uarta", "pll_p", 216000000, true }, > { "uartd", "pll_p", 216000000, true }, > + > + { "pll_p_out4", "pll_p", 24000000, true }, > + { "usbd", "clk_m", 12000000, false }, > + { "usb2", "clk_m", 12000000, false }, > + { "usb3", "clk_m", 12000000, false }, > + > { NULL, NULL, 0, 0}, > }; > > -- > 1.7.4.1 -- nvpublic N�����r��y����b�X��ǧv�^�){.n�+����{���+j)����w* jg��� �����ݢj/���z�ޖ��2�ޙ����&�)ߡ�a���� �G���h��j:+v���w��٥
