This series is more of a RFC, but is working pretty well already.
It adds a new API to control EMC performance. There are two new
functions added, to provide memory clients with a way to
communicate their memory performance demands to the EMC.
Documentation can be found inline.
I've tested this on my Colibri T20 with a memory config with the
following DDR clock rates: 88.25MHz, 133.2MHz, 166.5MHz, 333MHz.
I've verified that CPU clock changes toggle EMC clock changes, just
like before the change. Also with a 1080p display attached DDR
clock rate stays at 133,2MHz to satisfy the bandwidth demand of
the scanout.
With the series applied I no longer see display corruption caused
by FIFO underflow, while keeping the ability to demand scale the
EMC clockrate.
Lucas Stach (3):
ARM: tegra: add EMC clock scaling API
ARM: tegra: use new EMC clock scaling API in CPUfreq driver
ARM: tegra: drm: use new EMC clock scaling API to reserve DC
bandwidth
arch/arm/mach-tegra/cpu-tegra.c | 15 +++---
arch/arm/mach-tegra/tegra2_emc.c | 84 ++++++++++++++++++++++++++++++++--
drivers/gpu/drm/tegra/dc.c | 11 +++++
include/memory/tegra_emc_performance.h | 79 ++++++++++++++++++++++++++++++++
4 Dateien geändert, 179 Zeilen hinzugefügt(+), 10 Zeilen entfernt(-)
create mode 100644 include/memory/tegra_emc_performance.h
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1.7.11.7
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