On 12/17/2012 02:43 PM, Lucas Stach wrote: > Am Montag, den 17.12.2012, 14:23 -0700 schrieb Stephen Warren: >> On 12/14/2012 01:14 PM, Lucas Stach wrote: >>> This allows memory clients to collaboratively control the EMC >>> performance. >>> Each client may set its performance demands. EMC driver then tries to >>> find a DRAM performance level which is able to statisfy all those >>> demands.
>>> +static void tegra_emc_scale_clock(void) >> >>> + clock_rate = bandwidth_floor >> 2; /* 4byte/clock */ >> >> That assumes a 32-bit SDRAM interface. I'm sure that won't always be >> true. Perhaps we should invent a #define for this so it stands out >> slightly more if/when this needs to change later. >> > Hm, maybe we can add a DT property within the EMC node for this. I expect you can derive the memory bus width from a combination of the HW version and current register settings. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
