On 01/11/2013 03:07 PM, Stephen Warren wrote:
> From: Prashant Gaikwad <[email protected]>
>
> Add tegra specific clocks, pll, pll_out, peripheral,
> frac_divider, super.
> diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
> +static int clk_plle_training(struct tegra_clk_pll *pll)
> +{
> + u32 val;
> + int timeout;
Oops, I need to fix that up to be an unsigned long. I won't bother
reposting for that unless there's some other reason to repost.
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