On 11/29/2013 08:22 AM, Thierry Reding wrote: > On Wed, Nov 20, 2013 at 04:47:18PM -0700, Stephen Warren wrote: >> From: Stephen Warren <[email protected]> >> >> The blink clock rate needs to be configured, or it will run at >> ~1Hz rather than the desired 32KHz. If it runs at the wrong rate, >> e.g. the SDIO WiFi on Seaboard and Cardhu will fail to be >> detected. > > How is this related to WiFi?
The "blink" clock output from Tegra is connected to the WiFi module, which then uses it for something; it probably has a PLL connected to it that drives all the internal circuitry. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
