On Wed, Oct 01, 2014 at 12:40:41PM -0400, Sean Paul wrote: > Set the parent of the dsi lp clocks to pll_p and the rate > to 68MHz. The default parent is clk_m and rate is 12MHz, this > is too slow to receive data from the peripheral. > > Per NVidia HW engineers, the optimal rate is 70MHz, but 68MHz > will suffice. >
Looks good. I will take this for the next merge. Cheers, Peter. -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
