From: Mikko Perttunen <[email protected]>

This adds a node for the EMC memory controller. It is always enabled, but only
provides read-only functionality without board-specific timing tables.

Signed-off-by: Mikko Perttunen <[email protected]>
Signed-off-by: Tomeu Vizoso <[email protected]>

---

v5: Add a phandle to the CAR node that points to the EMC node
---
 arch/arm/boot/dts/tegra124.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 43f71d8..1c8b941 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -207,6 +207,7 @@
                reg = <0x0 0x60006000 0x0 0x1000>;
                #clock-cells = <1>;
                #reset-cells = <1>;
+               nvidia,external-memory-controller = <&emc>;
        };
 
        flow-controller@0,60007000 {
@@ -569,6 +570,13 @@
                #iommu-cells = <1>;
        };
 
+       emc: emc@0,7001b000 {
+               compatible = "nvidia,tegra124-emc";
+               reg = <0x0 0x7001b000 0x0 0x1000>;
+
+               nvidia,memory-controller = <&mc>;
+       };
+
        sata@0,70020000 {
                compatible = "nvidia,tegra124-ahci";
 
-- 
1.9.3

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