Stephen, > -----Original Message----- > From: Stephen Warren [mailto:[email protected]] > Sent: Monday, October 26, 2015 2:04 PM > To: Tom Warren <[email protected]> > Cc: [email protected]; Stephen Warren <[email protected]>; > [email protected]; [email protected]; [email protected]; > [email protected]; [email protected]; [email protected]; > [email protected]; Thierry Reding <[email protected]>; linux- > [email protected]; Alex Courbot <[email protected]>; linux-arm- > [email protected] > Subject: Re: [PATCH v3] Tegra: DT: add device tree binding doc for QSPI > > On 10/26/2015 02:34 PM, Tom Warren wrote: > > This patch adds the device tree binding doc for the Tegra QSPI > > controller on Tegra210. > > > diff --git > > a/Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt > > b/Documentation/devicetree/bindings/spi/nvidia,tegra210-qspi.txt > > > +- clock-names : Must include the following entries: > > + - qspi > > +- resets : Must contain an entry for each entry in reset-names. > > + See ../reset/reset.txt for details. > > +- reset-names : Must include the following entries: > > + - qspi > > +- clocks : Must contain an entry for each entry in clock-names. > > + See ../clocks/clock-bindings.txt for details. > > Let's keep clocks and clock-names next to each-other in the doc. I don't know > why they aren't in the eixsting Tegra SPI doc. OK. I assume 'clock-names', then 'clocks' since 'clocks' references clock-names.
> > With this issue fixed, this patch looks good to me. > > Note: I don't see the devicetree mailing list in the CC list. You should > probably > replace the U-Boot mailing list with it. I thought I had it, but may have dropped it. What exactly is the URL of the devicetree mailing list? [email protected]? or [email protected]? > > > +Optional properties: > > +- dmas : Must contain an entry for each entry in clock-names. > > + See ../dma/dma.txt for details. > > +- dma-names : Must include the following entries: > > + - rx > > + - tx > > Eventually, we should have a property that describes the SPI bus width (x1, > x2, > x4 I assume). However, we can assume that unless otherwise specified, the > width is x1, and add a property to specify the width later as/when we need it > if > you want. Tom -- nvpublic -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
