Hi,
Thanks David & Georg for the enlightenment. Seems my concerns wrt. to
alignment were unjustified, at least for device drivers.
Besides the buffer exposed to become PCI-BM target needs to be continuous
in physical memory and unswapable, there is another requirement I'm
thinking about: caching - at least L1 but probably others too.
What I mean is something like
*buffer = 0x12345f00;
dma_addr = pci_map_single(dev,buffer,len,PCI_DMA_TODEVICE);
pci_write_config_dword(dev,reg,dma_addr);
If caching is write-back my feeling is there is nothing that guarantees
the modification went to physmem before the device starts reading from it.
Well, admittedly it's not very likely because the window is pretty small.
However, unless I've missed something due to the architecture e.g.,
nothing forces the cache to be flushed (or disabled) when returning
the dma_addr_t. For x86, pci_map_single()/pci_alloc_consistent() simply
use virt_to_bus() to convert the start address. AFAICS there is nothing
there to get the PAGE_PCD, PAGE_PWT flags right.
So there might be another requirement for the buffer being passed to
pci_map_single(): caller must have caching disabled. Or pci_map_single()
should be prepared to do this - but then we need to save the PCD/PWT flags
somewhere so they can be restored by pci_unmap_single().
Comments? Did I miss something?
Martin
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