Hi,

> I'm working on writing support for the USB HC available in our ST40GX1 system
> on chip. This processor is basically a SH4 plus other devices (PCI, serial,
> video, USB, Teletext and PWM) connected by an on-chip bus called SuperHyway.
> The chip is mainly targeted at set-top-boxes and TV related applications.
> 
> ...
> 
> Reading the usb-ohci.[ch] files is obvious that the OHCI controller (and
> generally speaking all the HC's) is only expected to be found on the PCI bus.

True of the main kernel, but recent ARM kernels remove that restriction,
since the SA-1111 includes OHCI without PCI.  And looking a bit more
towards 2.5, the "hcd" framework has a relatively generic PCI layer that
is optional ... so stuff like OHCI can reuse the core, but not the PCI stuff.
(Same model as in the ARM stuff, but more common code is factored
out so that it can be shared between HC Drivers.)



> Has anyone already had the same problem? What about 2.5? IMHO some more
> separation between OHCI code and bus code would help someone else: are there
> other SOC's running Linux with the same problem? I'll look at the ARM chips
> anyway.

See above.  I hadn't realized that the recent ARM kernels actually
had that code already, I'm going to see if there's anything in the HCD
code (see the EHCI driver) that really needs to change.

- Dave



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