y'all probably already know this, but uhci TDs require contiguous memory for
the entire transaction. if your packet buffer spans a page boundary, the
next page must be contiguous.

Regards

John H.

>
> Ought to be fine, so long as the controller does DMA right,
> unless the UHCI spec demands otherwise.
>
> Most of the host controllers only demand alignment for their
> control infrastructure (QH, TD/ED, etc) so far as I've seen.
> I think the expectation is that device drivers are better off
>  not having to copy transfer buffers to force alighment.
>
> - Dave
>
>
> ----- Original Message -----
> From: "Johannes Erdfelt" <[EMAIL PROTECTED]>
> To: <[EMAIL PROTECTED]>
> Sent: Wednesday, November 07, 2001 5:33 PM
> Subject: Re: [linux-usb-devel] uchi lockup
>
>
> > On Wed, Nov 07, 2001, Matthew Dharm
> <[EMAIL PROTECTED]> wrote:
> > > Interesting... off the cuff, does uhci.o have any known
> problems with
> > > misaligned buffers?
> >
> > None that I know of.
> >
> > IIRC, the UHCI spec allows transfers from misaligned
> buffers. However,
> > we go through a layer of indirection with the PCI DMA API.
> I wonder if
> > it's safe.
> >
> > JE
> >


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