Jeff Garzik wrote:
On Wed, Mar 19, 2003 at 07:21:42AM -0800, David Brownell wrote:

Hi,

Some users have been sending init logs for Athlon kernels that
include PCI warning messages about the PCI cache line size
getting set incorrectly ... where the kernel thinks that the
right value is 16 bytes.  Since 64 bytes is the right number,
it's dangerous to enable MWI on such systems.

This patch stops trying to use MWI; it's a workaround for the
misbehavior of that PCI cacheline-setting code.  Please apply
to 2.5 and 2.4 trees.


Please don't -- Ivan has a patch for this, let's get that in instead.

I'd be happy with that, except on the 2.4 trees where we haven't seen such a patch yet. (So Greg -- please hold off on this for 2.5 unless/until it becomes clear Ivan's patch won't happen.)

We all acknowledge your patch is a workaround, but this sort of fix does
not belong in the mainstream kernel.  We want to fix it The Right
Way(tm), once.  And since a patch already exists for this...

Yep, I figured CC'ing LKML would help move things forward ... :)


- Dave



We need to get IvanK's extended-save-restore-state patch in, too.

Ivan, would you be up for a repost on lkml?

Jeff









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