> Sure, "queue_urb" puts the urb in the list of pending urbs, and in the
> interrupt routine thread "process_urb" picks them up, but here is where
> I loose track.
> Where in particular is the point where hcd says to hc: now do transfer!?
> How are the synchronisation mechanisms implemented in this context?
> Even if you do not or do not want to answer these details, any
> suggestions, comments are welcome.
What you are looking for are descriptions of OHCI and UHCI.
These chips are quite complex. They really read IO schedules from
main memory.
HTH
Oliver
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