In order to deal with both a PCI OHCI and the on-chip one, it would be necessary to have 2 instances of the driver built with different register access macros (and different macros for accessing in-memory data structures as well since those are big endian with that chip and little endian with a PCI chip).
Well, maybe not "necessary" ... if every reference to registers or the in-memory data structures could be switched at compile time from normal to big-endian, it could also be done at run-time.
But given what you said about chip errata and donelist corruption, maybe that'd be the best solution.
Thing is, I didn't think that readl()/writel() was supposed to be bus-specific.
Well ... it's supposed to be PCI and extend to all MMIO in the "normal" cases, but there isn't a simple way to deal with embedded chips like that who mix both a PCI bus (thus little endian devices) and on-chip big endian peripherals.
The conventions for providing access to chip registers are more than a bit overloaded, too ... readl() and inw() etc will "work" on most processors and busses, but the semantics change.
- Dave
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