On Wed, Jun 23, 2004 at 12:43:07PM -0400, Alan Stern wrote:
> Greg:
> 
> In a recent thread it was mentioned that some architectures, such as PPC,
> do not guarantee relative ordering between different varieties of
> processor/device data transfers.  This patch adds an mb() instruction to
> the UHCI driver, to insure that the data structures in memory (cached by
> the CPU and accessed by DMA) are fully flushed before the controller is
> started (by regular bus IO).
> 
> Please apply.

Applied, thanks.

greg k-h


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