Pat LaVarre wrote:
can happen even with a uniprocessor; the race relates
to how the FIFO is managed for the OUT endpoint. Normally
it's left ready to accept more data, so that firmware delays
in decyphering the request won't slow down the typical case
(no STALL). So the first data packet could have been ACKed
even before the storage request has been interpreted.
Could/ should the device fill the OUT queue itself so that the hardware
will NAK OUT til the firmware decides to ACK or STALL?
Only the host can always fill the OUT fifo. I don't
in fact know of any hardware that lets the device do it.
- Dave
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