On Wed, 15 Jun 2005, Aric D. Blumer wrote:

> I am bringing up the PXA27x UDC driver.  It is based on the pxa2xx_udc.c
> code, and in the handling of this particular case, it is the same.  So
> I'd expect the PXA25x devices to do the same thing, but I don't have
> anything to test it on.

David Brownell has done some work on the pxa2xx driver, so he ought to be 
able to help.

> This is what I believe is happening: The start_transfer() call enqueues
> the data packet to the bulk-in FIFO.  Then, halt_bulk_in_endpoint()
> calls usb_ep_set_halt(). In the PXA UDC drivers, this function sets the
> FST (force stall) bit for the endpoint as well as the FEF (flush
> endpoint FIFO) bit.  It seems to me from the PXA docs that setting the
> FST bit is correct (subsequent IN token requests will be stalled), but
> setting the FEF bit can't be right--it would likely remove the packet we
> just enqueued to the host.  But removing FEF from the assignment does
> not fix the problem.

What's supposed to happen, as I understand it, is the driver should return
-EAGAIN if the endpoint can't safely be halted yet (if the FIFO isn't
empty, for example).  Then halt_bulk_in_endpoint will enter a loop and
keep retrying the call to usb_ep_set_halt until it succeeds.

Alan Stern



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