Bill,
One issue with the PXA255 edge triggering is that you need
to be sure you poll the state of the interrupt line before you
re-enable the GPIO interrupt. That way if the device is asking
for more servicing, you won't miss it since there will be no
edge to detect.
Maybe you can look at what the CS8900a code is doing as
this has the same exact set of issues.
Michael
P.S. This means it working though?
At 03:29 PM 6/29/2005, Bill Gatliff wrote:
Guys:
Odd odd odd. :^)
The only combination which seems to work for me is this:
static struct isp116x_platform_data csb625_isp116x_platform_data = {
.sel15Kres = 1,
.int_act_high = 0,
.int_edge_triggered = 0,
.no_power_switching = 1,
};
...
set_irq_type(IRQ_GPIO(22), IRQT_FALLING);
I haven't tracked down why yet, but it seems like if I set
int_edge_triggered or change the polarity of anything around, the PXA
stops responding to interrupts from the isp1161.
I notice that INT is high on the isp1161 after coming out of reset, so
that might help explain some of it. But I can't quite tell why the
edge-sensitivity in set_irq_type isn't working. Could be in the pxa code,
or could be in the init code for the isp116x.
I'm *really* concerned about the apparent mismatch between edge triggering
in the GPIO input, and level triggering in the isp116x configuration. But
so far things seem to work fine, which further makes me think that
somewhere, something isn't quite right--- or I'm not testing hard enough.
I'm moving large files in and out of a USB pen drive, and doing
back-to-back-to-back fsck's with no apparent ill effects. So much to
investigate, so little time... :^)
b.g.
--
Bill Gatliff
[EMAIL PROTECTED]
Q: What lies on the bottom of the ocean and twitches?
A: A nervous wreck.
Michael J. Kelly
VP Engineering
Cogent Computer Systems, Inc.
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