This is the cleaned up version of a patch posted by Mark Overby a while back ... sets the consistent dma so that EHCI will work correctly on some boards. Mark, this fixes the linewrapping and "too late" problems with your patch; feel free to update it for any other chips with this issue.
- Dave
NVidia reports (via Mark Overby) that some of their EHCI controllers don't like certain data structure addresses beyond the 2GB mark. He provided an earlier version of this patch. Signed-off-by: David Brownell <[EMAIL PROTECTED]> --- g26.orig/drivers/usb/host/ehci-hcd.c 2005-08-31 10:34:26.000000000 -0700 +++ g26/drivers/usb/host/ehci-hcd.c 2005-08-31 19:35:21.000000000 -0700 @@ -400,6 +400,23 @@ static int ehci_hc_reset (struct usb_hcd return -EIO; } break; + case PCI_VENDOR_ID_NVIDIA: + /* NVidia reports that certain chips don't handle + * QH, ITD, or SITD addresses above 2GB. (But TD, + * data buffer, and periodic schedule are normal.) + */ + switch (pdev->device) { + case 0x003c: /* MCP04 */ + case 0x005b: /* CK804 */ + case 0x00d8: /* CK8 */ + case 0x00e8: /* CK8S */ + if (pci_set_consistent_dma_mask(pdev, + DMA_31BIT_MASK) < 0) + ehci_warn (ehci, "can't enable NVidia " + "workaround for >2GB RAM\n"); + break; + } + break; } /* optional debug port, normally in the first BAR */