On Tue, 27 Sep 2005, Atsushi Nemoto wrote:
> >>>>> On Tue, 27 Sep 2005 10:21:17 -0400 (EDT), Alan Stern <[EMAIL
> >>>>> PROTECTED]> said:
>
> stern> Yes I did. You can see it at
> stern>
> https://lists.one-eyed-alien.net/pipermail/usb-storage/2005-September/001953.html
>
> Thank you. But 'kmalloc(US_SENSE_SIZE, GFP_KERNEL)' is not enough (at
> least) for MIPS since some MIPS chips have 32 byte cacheline and
> ARCH_KMALLOC_MINALIGN is 8 on linux-mips.
>
> Using 'max(dma_get_cache_alignment(), US_SENSE_SIZE)' would be OK.
If that is so, it's a bug in linux-mips. ARCH_KMALLOC_MINALIGN is
supposed to be at least as large as a cacheline. See this comment in
mm/slab.c:
/*
* Enforce a minimum alignment for the kmalloc caches.
* Usually, the kmalloc caches are cache_line_size() aligned, except when
* DEBUG and FORCED_DEBUG are enabled, then they are BYTES_PER_WORD aligned.
* Some archs want to perform DMA into kmalloc caches and need a guaranteed
* alignment larger than BYTES_PER_WORD. ARCH_KMALLOC_MINALIGN allows that.
* Note that this flag disables some debug features.
*/
and also this comment (referring to the kmalloc caches):
/*
* For performance, all the general caches are L1 aligned.
* This should be particularly beneficial on SMP boxes, as it
* eliminates "false sharing".
* Note for systems short on memory removing the alignment will
* allow tighter packing of the smaller caches.
*/
Alan Stern
-------------------------------------------------------
This SF.Net email is sponsored by:
Power Architecture Resource Center: Free content, downloads, discussions,
and more. http://solutions.newsforge.com/ibmarch.tmpl
_______________________________________________
[email protected]
To unsubscribe, use the last form field at:
https://lists.sourceforge.net/lists/listinfo/linux-usb-devel
