Dear David,
> There are other interfaces for both full/low speed hosts ("USB 1.1" as
> well as "USB 2.0") and for high speed ones (only "USB 2.0"). Those
are
> common primarily because of PCs. Where gate count matters, silicon
> vendors may find it better to avoid "standard" register interfaces.
>
> I've used high speed hosts that aren't EHCI, and full/low speed ones
> that aren't OHCI or UHCI ...
If that is the case, it will involve rewriting the complete USB stack
for that particular hardware.
Can you provide me a link describing all the possible scenarios that can
exist when connecting two USB devices (covering cases like ... both are
OTG, one is OTG)?
> The OTG hardware (and its driver) kicks in before drivers for either
> host or peripheral roles; so it's a lower level driver, not (as you
> drew it) a higher level one.
Yes, right. I got a vague picture now. Thanks.
> You need to read both the OTG 1.0a and USB 2.0 specs, as well as the
> specs for your host and peripheral controllers.
Yes, I will do it. I do not have the hardware specs yet so, let me start
with USB specs first.
> To the extent that
> your PHY is documented and accessible, you'll need to understand how
> that interacts with the controllers too.
You mean how software interacts with the controller.
I got the isp1301_omap in drivers/i2c/chips/isp1301_omap.c
Regards,
Mukund Jampala
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