Hi Rakesh, Below are the details of the changes that I made to fix the problem of endianess for IXP465 Embedded USB Host controller driver. I am using IXP465 in the big endian mode.
On the whole the changes are only in the host specific files "ehci.h", "ehci-hcd.c", "ehci-mem.c", "ehci-q.c". You will need to make the similar changes in "ehci-sched.c" if you are going to use periodic transfers. I removed "cpu_to_le32" and "__constant_cpu_to_le32" from the above-mentioned files for the qtd and qh data structures. Also make sure to use "u32" instead of "u64" if your architecture is not supporting "u64". The Linux source is using this in "qtd_fill" function in "ehci-q.c" file. After doing the above changes I was getting a STALL handshake from the device. This was due to a wrong request that could be seen on the analyzer. I then programmed the USBMODE register to big endian, which caused the transfer buffers to be correctly placed, and this solved the problem of STALL handshake and the entire enumeration sequence then completed perfectly. Another point that I observed is that when I used readl function to read the default registers of USB host I used to get the shifted values. Then I defined a customized macro (my_readl) similar to readl but the one that does not change the endianess of the data being read. When I used this customized macro I used to get the default value of the registers as per the datasheet. This led to the idea of actually removing the endianess macros that the Linux source is using for the qtd and qh data structures, which fixed the problem. The enumeration is working fine now with the above mentioned changes. I am facing issue related to mounting of the USB disk. I have posted on the group for the same. Do let me know if you can fix your issue and what happens after making the suggested changes. Thanks and Regards, Maulik Mankad -----Original Message----- From: rakesh kn [mailto:[EMAIL PROTECTED] Sent: Tuesday, July 25, 2006 10:58 AM To: Maulik Mankad Subject: Re: [linux-usb-devel] EHCI IXDP465 USB Host :- : device not accepting address 3, error -110 Hi Maulik, Happy to note that u have over-come the problem... As we had suspected the problem was with cpu_to_le32 conversion of DMA hardware address. Can u provide details of the files in which u have changed the endianess conversion. I possible. mention all the functions u have changed. This would help me in a great deal to reduce my development time. I am stuck up wiht some harware issues with host controller initialisation. So i have not reached this stage, but i suspect i may face this problem. Was ur host controller running in Big- Endian or Little-Endian mode ..? I think u are running it in Big-Endian mode , as u have removed the cpu_to_le32 conversion.. Please do provide the above help ..? On 7/24/06, Maulik Mankad <[EMAIL PROTECTED]> wrote: > Hi, > > I have been able to fix this issue. > > The problem was incorrect endianess. > > I removed "cpu_to_le32" macro from all the qtd and qh data structures in > "ehci-q.c" and some other relevant host files. > > My processor works in big endian and I think the Linux USB code is for > little endian processor. As a result after making the above change I was > able to resolve this issue. > > The DMA engine was not able to transfer packets on the bus as it was > referring to some wrong address (swapped address) due to incorrect > endianess. > > Thanks for all the support I have got from the Linux USB group. > > Regards, > Maulik Mankad > > > > -----Original Message----- > From: Alan Stern [mailto:[EMAIL PROTECTED] > Sent: Thursday, June 22, 2006 9:34 PM > To: Maulik Mankad > Cc: David Brownell; linux-usb-devel@lists.sourceforge.net > Subject: RE: [linux-usb-devel] EHCI IXDP465 USB Host :- : device not > accepting address 3, error -110 > > On Thu, 22 Jun 2006, Maulik Mankad wrote: > > > Hi Alan and David, > > > > First of all let me thank both of you for replying to my mail. > > > > This is what the datasheet of Intel's IXP465 say for the Embedded TT. > > > > "IXP465 USB host supports directly connected full and low speed devices > > without requiring a companion controller by including the capabilities of > a > > USB 2.0 high-speed hub transaction > > translator. Although there is no separate Transaction Translator block in > > the system, the transaction translator function normally associated with a > > high-speed hub has been implemented within the DMA and Protocol engine > > blocks. The embedded transaction translator function is an extension to > EHCI > > interface, but makes use of the standard data structures and operational > > models that exist in the EHCI specification to support full and low speed > > devices." > > Okay. You said earlier that there are no transaction translators > available; you didn't say that one is already embedded in the device. > > > (1) Can there be a problem in the DMA engine, which is not transmitting my > > descriptor requests to the device? I do not have any programmable register > > to start the DMA or to initialize it. > > You'd better ask Intel about that. They know a lot more than we do about > errors in their devices. > > > Alan- > > ============ > > About Bus trace. > > ============ > > I use the Ellisys USB analyzer (hardware) to capture the USB packets on > the > > bus. The analyzer shows the following packets. > > -> Reset > > -> High Speed Detection Handshake (Timeout) [The device properly > generates > > the High Speed Chirp but no response from host, as the host does not > support > > High Speed] > > -> SOF packets. > > -> Suspended State > > > > At this point as per the bus enumeration sequence I should get the Device > > Descriptor request on the bus. The USB analyzer does not capture this > > request. Moreover I have traced the Linux core code for the USB and it > seems > > that the request gets timed out and then aborted and removed from the > queue. > > This is why I believe its not captured by the analyzer. > > No -- the reason it is not captured by the analyzer is because the > controller never sends the request at all. Perhaps the EHCI driver > doesn't support this controller fully, or there might be some other > problem with your hardware setup. > > For instance, why do you get "Suspended State"? Why don't the SOF packets > continue? > > Alan Stern > > > > eInfochips Business Disclaimer: > This message may contain confidential, proprietary or legally Privileged > information. In case you are not the original intended Recipient of the > message, you must not, directly or indirectly, use, Disclose, distribute, > print, or copy any part of this message and you are requested to delete it > and inform the sender. Any views expressed in this message are those of the > individual sender unless otherwise stated. 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Nothing contained in this message shall be construed as an offer or acceptance of any offer by eInfochips Limited and/or eInfochips Inc("eInfochips") unless sent with that express intent and with due authority of eInfochips. eInfochips has taken enough precautions to prevent the spread of viruses. However the company accepts no liability for any damage caused by any virus transmitted by this email. ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys -- and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV _______________________________________________ linux-usb-devel@lists.sourceforge.net To unsubscribe, use the last form field at: https://lists.sourceforge.net/lists/listinfo/linux-usb-devel
