HI, i am stuck in a problem where after queing the trasnfer and configuring the endpoint the controller clears the control list enable bit of HC control register- bit 27 .(This I assume as the indication for controller completing the qued TD's)
But i am not getting any TD at HC done head register not in the HCCA. Can I know what could be the problem. Regards Siddharth ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys - and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV _______________________________________________ linux-usb-devel@lists.sourceforge.net To unsubscribe, use the last form field at: https://lists.sourceforge.net/lists/listinfo/linux-usb-devel
