On Fri, 5 Aug 2005, Enrico wrote:

> > Some other possibilities:  Your host controller driver doesn't handle long
> > bulk transfers (>= 512 bytes) correctly.  Your USB cables introduce enough
> > noise to interfere with long packet transmission.  The timing of packets
> > on your host is different from the timing on the Linux host -- note that
> > if your Iomega drive uses a Genesys Logic interface chip (vendor 0x05e3,
> > product 0x0701 or 0x0702) then it needs to have a 100us pause between the
> > CBW and data phases when doing disk I/O.  The host controller you're using
> > and the device controller on the Iomega drive simply don't like each other
> > (I've seen this more than once).
> >
> > Alan Stern
> 
> Thanks for these hints, we are trying all these possibilities. 
> 
> We have a doubt...
> How can we put that pause of 100us between the CBW and data phases?
> We put CBW into qtd1 and data into qtd2 under the same QH and so when QH 
> starts we have no control on timing... Must we use a QH for each qtd? I don't 
> think it's so good, isn't it?

It sounds like you queue your data-phase transfers to the HC driver before 
the CBW has completed.  Don't do that.  Instead, wait for the CBW to 
complete, then wait an additional 125 microseconds or so, and then queue 
the data-phase transfers.

Alan Stern



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