> From: Felipe Balbi [mailto:[email protected]]
> Sent: Monday, February 11, 2013 6:30 AM
>
> On Sat, Feb 09, 2013 at 07:37:51PM -0800, Paul Zimmerman wrote:
> > +static struct dwc2_core_params dwc2_module_params = {
> > + .otg_cap = 0, /* HNP/SRP capable */
> > + .dma_enable = 1,
> > + .dma_desc_enable = 1,
> > + .speed = 0, /* High Speed */
> > + .host_support_fs_ls_low_power = 0,
> > + .host_ls_low_power_phy_clk = 0, /* 48 MHz */
> > + .enable_dynamic_fifo = 1,
> > + .host_rx_fifo_size = 1024, /* 1K DWORDs */
> > + .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
> > + .host_perio_tx_fifo_size = 1024, /* 1K DWORDs */
> > + .max_transfer_size = 65535,
> > + .max_packet_count = 511,
> > + .host_channels = 10,
> > + .phy_type = 1, /* UTMI */
> > + .phy_utmi_width = 16, /* 16 bits */
> > + .phy_ulpi_ddr = 0, /* Single */
> > + .phy_ulpi_ext_vbus = 0,
> > + .i2c_enable = 0,
> > + .ulpi_fs_ls = 0,
> > + .ts_dline = 0,
> > + .en_multiple_tx_fifo = 1,
> > + .lpm_enable = 0,
> > + .ic_usb_cap = 0,
> > + .reload_ctl = 0,
> > + .ahb_single = 0,
> > + .otg_ver = 0, /* 1.3 */
> > +};
>
> wow!! Don't you have some of the GHWPARAMS registers as you do on dwc3 ?
I think I answered this one in 0/5.
> > +static irqreturn_t dwc2_common_irq(int irq, void *dev)
> > +{
> > + int retval = dwc2_handle_common_intr(dev);
> > +
> > + return IRQ_RETVAL(retval);
> > +}
>
> IMO this shouldn't be here, dwc2 itself should request the IRQ.
I think it's cleaner to do all the bus interface stuff here. But I see
now this function is not necessary, I can do the request_irq() using
dwc2_handle_common_intr() directly.
For the rest of your comments here, I agree and will fix everything
you mentioned.
--
Paul
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