On Sat, 5 Oct 2013, Ming Lei wrote: > > The buffer should be cached. The userspace program will have to make > > sure that it doesn't try to access the buffer while DMA is in progress. > > As long as that restriction is obeyed, the USB core will take care of > > mapping the buffer for DMA (which flushes the cache). > > No, HCD mapping/unmapping can't deal with the problem since they > use the kernel direct-mapped virtual address of the buffer to flush > cache, but applications use the mapped virtual address, and CPU > can use both the two virtual addresse to cache data, so it is probable > that the transfer buffer can be cached in more than one locations by > CPU for VIVT or VIPT-alias cache. > > So Markus takes the simplest way which uses nocahced mapping, but > it may degrade performance on some ARCHs since it is reported that it > is extremely slow to access non-cached memory on some ARMv7 SoCs.
Then how do you suggest the cache be flushed? Alan Stern -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
