On Tue, Mar 31, 2015 at 10:02:52AM -0400, Alan Stern wrote: > On Tue, 31 Mar 2015, Peter Chen wrote: > > > I reproduced this issue, I can't see the fifth endpoints during the SoFs > > although the time to SoF boundary is about 800us, see attached. > > > > - At transaction 3749, the third UAC2 gadget is ready to send/receive > > data. > > - At next SoF periods, the first and the second devices send/receive > > data. > > - At transaction 3754, the third device's OUT is on the bus, but the > > address 11's OUT is disappeared. > > > > I reported this problem to IC team, but they are on new SoC validation > > periods, they said they will simulate it after new project has finished. > > That's great! I'm happy that you were able to duplicate the problem. > Please let me know what the IC team has to say when they look at it. >
Sure > Do you know whether Freescale's root-hub TT implementation was done > in-house? Or was it based on the old ARC/TDI IP? It's possible that a > lot of different kinds of host controllers suffer from this problem. Afaik, It is based on chipidea IP, should be the old ARC IP, since chipidea got this IP from ARC. -- Best Regards, Peter Chen -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
