On Thu, Feb 11, 2016 at 12:01:06PM +0100, Petr Kulhavy wrote:
> This adds DT support for the TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver.
>
> Signed-off-by: Petr Kulhavy <[email protected]>
> ---
> .../devicetree/bindings/usb/da8xx-usb.txt | 47
> ++++++++++++++++++++++
> 1 file changed, 47 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/da8xx-usb.txt
>
> diff --git a/Documentation/devicetree/bindings/usb/da8xx-usb.txt
> b/Documentation/devicetree/bindings/usb/da8xx-usb.txt
> new file mode 100644
> index 0000000..62dcc51
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/da8xx-usb.txt
> @@ -0,0 +1,47 @@
> +TI DA8xx MUSB
> +~~~~~~~~~~~~~
> +For DA830 and DA850 platforms.
> +
> +Required properties:
> +~~~~~~~~~~~~~~~~~~~~
> + - compatible : Should be set to "ti,da830-musb".
> +
> + - reg: Offset and length of the USB controller register set.
> +
> + - interrupts: The USB interrupt number.
> +
> + - interrupt-names: Should be set to "mc".
> +
> + - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or
> "otg".
> +
> + - mentor,power : Specifies the maximum current in milliamperes the
> controller can
> + supply in host mode.
Still a no for me. Looks like this just sets hcd->power_budget. This
property may not be a regulator, but ultimately the value depends on
some regulator supplying Vbus. Also, given this has nothing to do with
MUSB h/w, however this is described should be generic.
> +
> + - ti,phy20-refclock-frequency : Integer. Defines the USB 2.0 PHY reference
> clock input
> + frequency in Hz in case the clock is generated by the internal PLL.
> + Supported values are 12MHz, 13MHz, 19.2MHz, 20MHz, 24MHz, 26MHz,
> 38.4MHz, 40MHz, 48MHz
> +
> +
> +Optional properties:
> +~~~~~~~~~~~~~~~~~~~~
> + - ti,phy20-clkmux-pll: Boolean. Defines the USB 2.0 PHY reference clock
> source.
> + If present the internal PLL is used as a clock source, otherwise the
> external
> + USB_REFCLKIN pin is used.
> +
> +Example:
> +
> + usb20: usb@1e00000 {
> + compatible = "ti,da830-musb";
> + reg = <0x00200000 0x10000>;
> + interrupt-parent = <&intc>;
> + interrupts = <58>;
> + interrupt-names = "mc";
> +
> + dr_mode = "host";
> + mentor,power = <500>;
> +
> + ti,phy20-clkmux-pll;
> + ti,phy20-refclock-frequency = <24000000>;
> +
> + status = "okay";
> + };
> --
> 1.9.1
>
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