On Sat, Sep 29, 2018 at 07:44:55PM +0200, Lorenzo Bianconi wrote:
> + spin_lock_bh(&dev->lock);
> + if (wcid && (rate->idx < 0 || !rate->count)) {
> + txwi->rate = wcid->tx_rate;
> + max_txpwr_adj = wcid->max_txpwr_adj;
> + nss = wcid->tx_rate_nss;
> + } else {
> + txwi->rate = mt76x02_mac_tx_rate_val(dev, rate, &nss);
> + max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);
> + }
> + spin_unlock_bh(&dev->lock);
> +
> + if (dev->drv->get_tx_txpwr_adj) {
> + txpwr_adj = dev->drv->get_tx_txpwr_adj(dev, dev->txpower_conf,
> + max_txpwr_adj);
> + txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj);
> + }
> +
> + if (is_mt76x2(dev) && mt76_rev(dev) >= MT76XX_REV_E4)
> + txwi->txstream = 0x13;
> + else if (is_mt76x2(dev) && mt76_rev(dev) >= MT76XX_REV_E3 &&
> + !(txwi->rate & cpu_to_le16(rate_ht_mask)))
> + txwi->txstream = 0x93;
All above looks mt76x2 specific, maybe would be beter to place this in
in setup_txwi() calback i.e:
if (dev->drv->setup_txwi)
drv->drv->setup_txwi(...)
or maybe you plan to implement get_tx_txpwr_adj() for mt76x0 as well,
is this feature supported by the MT76x0 chips ?
Thanks
Stanislaw
