From: Vignesh R <[email protected]> commit 32bad8b7367310ee86270f3c67f444d3c5bcff76 from https://git.ti.com/git/processor-sdk/processor-sdk-linux.git branch: processor-sdk-linux-4.19.y
AM654 SoC has a Flash Subsystem(FSS) with two Cadence Octal SPI(OSPI) controllers. Add DT entries for the same. Reviewed-by: Roger Quadros <[email protected]> Signed-off-by: Vignesh R <[email protected]> Signed-off-by: Sekhar Nori <[email protected]> Signed-off-by: Jun Miao <[email protected]> --- arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 41 +++++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 10 ++++-- 2 files changed, 49 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 7bdf5342f58f..e32a7d13a72e 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -95,4 +95,45 @@ compatible = "ti,am654-adc", "ti,am3359-adc"; }; }; + + fss: fss@47000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x0 0x47040000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x50000000>; + cdns,delay-elem-ps = <80>; + clocks = <&k3_clks 55 5>; + assigned-clocks = <&k3_clks 55 5>; + assigned-clock-parents = <&k3_clks 55 7>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 55>; + #address-cells = <1>; + #size-cells = <0>; + dma-coherent; + }; + + ospi1: spi@47050000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x0 0x47050000 0x0 0x100>, + <0x7 0x00000000 0x1 0x00000000>; + interrupts = <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x58000000>; + clocks = <&k3_clks 55 16>; + power-domains = <&k3_pds 55>; + #address-cells = <1>; + #size-cells = <0>; + dma-coherent; + }; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 6dfccd5d56c8..5efac52acffe 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -80,7 +80,10 @@ <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, - <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, + <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, + <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, + <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; cbass_mcu: interconnect@28380000 { compatible = "simple-bus"; @@ -94,7 +97,10 @@ <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */ <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */ <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */ - <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; /* OSPI space 1 */ + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */ + <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /* FSS OSPI0 data region 1 */ + <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/ + <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/ cbass_wakeup: interconnect@42040000 { compatible = "simple-bus"; -- 2.17.1
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