Hi Bruce, There are some latest patches from nxp-s32g, and intend to merge into branch v5.10/standard/nxp-sdk-5.4/nxp-s32g2xx.
There are 89 patches in my public repo https://github.com/zhantaotang/linux-yocto-std.git, branch v5.10/standard/nxp-sdk-5.4/nxp-s32g2xx. Could you please help to merge these patches into linux-yocto, v5.10, v5.10/standard/nxp-sdk-5.4/nxp-s32g2xx branch? The patches info are as following: The following changes since commit d466f8a238b2b536dde79a95739d49e96456dab8: Merge branch 'v5.10/standard/base' into v5.10/standard/nxp-sdk-5.4/nxp-s32g2xx (2021-05-13 22:57:39 -0400) are available in the Git repository at: https://github.com/zhantaotang/linux-yocto-std v5.10/standard/nxp-sdk-5.4/nxp-s32g2xx for you to fetch changes up to 7b71de94fd8c9b665ed36760c9e4a4c62f15377a: drivers: phy: s32gen1-serdes: drop the redundant phy id setting (2021-05-17 11:18:28 +0800) ---------------------------------------------------------------- Andra-Teodora Ilie (2): gpio: Set pin direction first then the value dts: s32g274, s32r45: Add missing i2c pinmuxing Bogdan Folea (5): hse: replace ifdefs with compiler-visible checks hse: update firmware ABI to version 0.9.0 hse: remove DDR descriptor placement limitation hse: add config option for debug messages hse: move reserved memory for userspace to SRAM Bogdan Hamciuc (2): drivers:pci:s32gen1: Mark PCIe transactions coherent rtc:s32gen1: Save time before system suspend Catalin Udma (4): dts: fs-s32-gen1 move common SIUL2_0 ranges from s32g/s32r to s32-gen1 nvmem: simple nvmem driver exporting SoC revision for s32-gen1 doc: add documentation for S32 SIUL2 NVMEM driver S32 revision: create the header file for S32 SoC revision Ciprian Marian Costea (7): fsl_quadspi: Refactor 'lut_configs' as part of device structure fsl-quadspi: Add suspend & resume functionality s32-adc: Fix STR support s32-gen1: thermal: Add STR support fsl_fccu: Fix double reference to 'priv_data' fsl_fccu: s32-gen1: Add STR support s32-gen1: fsl-quadspi: Map AHB buffer at first read from QSPI Claudiu Manoil (1): dts: s32g274a: pfe: nvmem properties for SoC rev Ghennadi Procopciuc (42): gpio: s32gen1: Mark EIRQ status register volatile net: s32cc-dwmac: Add RX clock clocksource: pit: Use platform bindings clocksource: pit: Implement suspend & resume callbacks clocksource: pit: Replace CPU hotplug callbacks with workqueue clocksource: stm: Use platform bindings clocksource: stm: Implement suspend & resume callbacks clocksource: stm: Replace CPU hotplug callbacks with workqueue clk: s32-gen1: Sort MC_CGM clock ids dt-bindings: clk: s32gen1: Add GMAC1 clocks dts: s32r45: Add GMAC1 RX clocks clk: s32gen1: Add missing GMAC clocks dt-bindings: s32gen1: Add SCMI reset IDs Documentation: Use "fsl,s32gen1-prstc" compatible instead of "fsl,s32gen1-reset" dts: Make use of the new compatible string for S32GEN1 power reset power-reset: Use "fsl,s32gen1-prstc" instead of "fsl,s32gen1-reset" Documentation: Add S32GEN1 reset controller dts: s32gen1: Add reset controller nodes reset: Add S32GEN1 reset controller driver dts: s32gen1: Add SCMI reset node clk: s32gen1: Add SerDes clock dts: s32gen1: pcie: Exclude SerDes subsystem registers from PCIE pcie: s32gen1: Adapt registers offsets of CTRL region pcie: s32gen1: Introduce "fsl,s32gen1-pcie-ep" devicetree: pcie: s32gen1: Document "fsl,s32gen1-pcie-ep" devicetree: s32gen1: Document SerDes bindings phy: Add SerDes driver for S32 Gen1 platforms dt-bindings: s32gen1: Add SerDes subsystem modes dts: s32gen1: Add SerDes nodes driver: phy: s32gen1: Add PM ops for SerDes driver pci: s32gen1: Encapsulate device tree initialization pci: s32gen1: Enable probe deferral pcie: s32gen1: Initialize PCIE PHY pcie: s32gen1: Remove unused defines llce-can: Add compatibility with LLCE firmware 1.0.0 llce-mailbox: Limit bus errors llce-can: Add compatibility with LLCE firmware 1.0.1 CD1 dts: s32gen1: Make MC_RGM and MC_ME nodes syscons clk: s32gen1: Add MC_ME, RDC & RGM headers reboot: s32gen1: Correct the usage of RGM regmap clk: s32gen1: Remove clock partition control reset: s32gen1: Add partitions to reset controller Jan Petrous (8): dts: s32g274a: pfe: enumerate HIF modes dts: s32g27a: pfe: Complex update for BETA 0.9.4 dts: fsl-s32g274a: pfe: switch rgmii phy mode to rgmii-id dt-bindings: s32g274a: pfe: PFE controller reset support dt-bindings: s32g274a: pfe: add EMAC RX clocks s32g274a:pins: PFE EMAC_2 RGMII pins definition s32g274a:pins: PFE EMAC_2 RGMII pins dt-bindings: s32g274a: PFE EMAC_2 RGMII pins Larisa Grigore (9): s32g274:clk:scmi: Use S32G instead of S32G274 dwc: pci-s32gen1: Use more than one MSI dts: s32gen1: Define gic node as a msi controller doc: fsl,s32-pcie: Add msi-parent description serial:linflex: We should not wait rx fifo empty include:s32gen1: Refactor GPIO pad description pinctrl:s32gen1: Remove PUE/PUS from GPIO configuration spi-fsl-dspi: Reinitialize DSPI regs after resume for s32gen1 dts: s32g: Add default delay for SPI nodes Ondrej Spacek (4): phy: Add better support for Ethernet in SerDes driver. dts: Add phys to PFE to allow usage of SerDes driver. dts: Fix GMAC MDIO pin handle, Set pfe1 to SGMII phy: Fix SGMII AN enable bit being incorrect after resume. Radu Pirea (1): phy: nxp-c45-tja11xx: add driver for tja1103 Radu Pirea (NXP OSS) (2): dts: s32gen1: gpio: add interrupt-cells property net: phy: add genphy_c45_pma_suspend/resume Wong Vee Khee (1): net: phy: add genphy_c45_loopback Zhantao Tang (1): drivers: phy: s32gen1-serdes: drop the redundant phy id setting Documentation/devicetree/bindings/fsl-pfeng.txt | 325 ++++-- .../bindings/nvmem/fsl,s32-siul2-nvmem.yaml | 54 + .../devicetree/bindings/pci/fsl,s32-pcie.txt | 21 +- .../bindings/phy/fsl,s32gen1-serdes.yaml | 142 +++ .../bindings/power/reset/fsl,s32gen1-prstc.txt | 11 + .../bindings/power/reset/fsl,s32gen1-reset.txt | 17 - .../bindings/reset/fsl,s32gen1-reset.yaml | 40 + arch/arm64/Kconfig.platforms | 3 + arch/arm64/boot/dts/freescale/fsl-s32-gen1.dtsi | 179 +++- .../boot/dts/freescale/fsl-s32g274a-bluebox3.dts | 10 +- arch/arm64/boot/dts/freescale/fsl-s32g274a-evb.dts | 90 +- arch/arm64/boot/dts/freescale/fsl-s32g274a-rdb.dts | 9 +- .../arm64/boot/dts/freescale/fsl-s32g274a-rdb.dtsi | 119 ++- .../arm64/boot/dts/freescale/fsl-s32g274a-rdb2.dts | 26 +- arch/arm64/boot/dts/freescale/fsl-s32g274a.dtsi | 357 +++++-- arch/arm64/boot/dts/freescale/fsl-s32r45-evb.dts | 37 + arch/arm64/boot/dts/freescale/fsl-s32r45.dtsi | 23 +- drivers/clk/s32/s32-gen1/clk.c | 128 ++- drivers/clk/s32/s32-gen1/clk.h | 13 +- drivers/clk/s32/s32-gen1/mc_cgm.h | 11 +- drivers/clk/s32/s32-gen1/mc_me.h | 38 + drivers/clk/s32/s32-gen1/part_block.c | 163 +-- drivers/clk/s32/s32-gen1/rdc.h | 15 + drivers/clk/s32/s32-gen1/rgm.h | 20 + drivers/clocksource/timer-fsl-stm.c | 214 ++-- drivers/clocksource/timer-vf-pit.c | 254 +++-- drivers/crypto/hse/Kconfig | 19 +- drivers/crypto/hse/Makefile | 6 +- drivers/crypto/hse/hse-abi.h | 72 +- drivers/crypto/hse/hse-aead.c | 384 +++---- drivers/crypto/hse/hse-ahash.c | 149 +-- drivers/crypto/hse/hse-core.c | 225 ++-- drivers/crypto/hse/hse-core.h | 4 +- drivers/crypto/hse/hse-mu.c | 32 +- drivers/crypto/hse/hse-mu.h | 5 +- drivers/crypto/hse/hse-rng.c | 28 +- drivers/crypto/hse/hse-skcipher.c | 107 +- drivers/crypto/hse/hse-uio.c | 47 +- drivers/gpio/gpio-siul2-s32gen1.c | 8 +- drivers/iio/adc/s32_adc.c | 4 +- drivers/mailbox/llce-mailbox.c | 98 +- drivers/mfd/llce-core.c | 59 +- drivers/misc/fccu/fsl_fccu.c | 27 +- drivers/mtd/spi-nor/controllers/fsl-quadspi.c | 63 +- drivers/mtd/spi-nor/controllers/fsl-quadspi.h | 14 + drivers/mtd/spi-nor/controllers/s32gen1_qspi.c | 57 +- drivers/net/can/llce_can.c | 40 +- drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c | 42 +- drivers/net/pcs/Makefile | 1 + drivers/net/pcs/fsl-s32gen1-xpcs.c | 1075 +++++++++++++++++++ drivers/net/phy/Kconfig | 6 + drivers/net/phy/Makefile | 1 + drivers/net/phy/nxp-c45-tja11xx.c | 473 +++++++++ drivers/net/phy/phy-c45.c | 52 + drivers/nvmem/Kconfig | 11 + drivers/nvmem/Makefile | 2 + drivers/nvmem/s32_siul2_nvmem.c | 109 ++ drivers/pci/controller/dwc/pci-s32gen1-regs.h | 101 +- drivers/pci/controller/dwc/pci-s32gen1.c | 400 +++++-- drivers/pci/controller/dwc/pci-s32gen1.h | 30 +- drivers/phy/freescale/Kconfig | 8 + drivers/phy/freescale/Makefile | 1 + drivers/phy/freescale/phy-fsl-s32gen1-serdes.c | 970 +++++++++++++++++ drivers/pinctrl/freescale/pinctrl-s32-gen1-core.c | 10 +- drivers/pinctrl/freescale/pinctrl-s32g274.c | 28 +- drivers/power/reset/Makefile | 2 + drivers/power/reset/s32gen1-reboot.c | 94 +- drivers/reset/Kconfig | 10 + drivers/reset/Makefile | 2 + drivers/reset/reset-s32gen1.c | 513 +++++++++ drivers/rtc/rtc-s32gen1.c | 42 +- drivers/spi/spi-fsl-dspi.c | 78 +- drivers/thermal/s32_thermal.c | 71 +- drivers/tty/serial/fsl_linflexuart.c | 16 - include/dt-bindings/clock/s32g-scmi-clock.h | 65 ++ include/dt-bindings/clock/s32g274a-scmi-clock.h | 65 -- include/dt-bindings/clock/s32gen1-clock.h | 16 +- include/dt-bindings/net/fsl-s32g-pfeng.h | 13 + include/dt-bindings/phy/phy-s32gen1-serdes.h | 14 + include/dt-bindings/pinctrl/s32-gen1-pinctrl.h | 7 +- include/dt-bindings/pinctrl/s32g274-pinctrl.h | 394 ++++--- include/dt-bindings/pinctrl/s32r45-pinctrl.h | 280 ++--- include/dt-bindings/reset/s32g-scmi-reset.h | 19 + include/dt-bindings/reset/s32gen1-scmi-reset.h | 33 + include/dt-bindings/reset/s32r45-scmi-reset.h | 19 + include/linux/mailbox/nxp-llce/llce_can.h | 1093 +++++++++----------- include/linux/mailbox/nxp-llce/llce_fw_interface.h | 410 ++++++++ include/linux/mailbox/nxp-llce/llce_fw_version.h | 26 +- .../linux/mailbox/nxp-llce/llce_interface_config.h | 127 +-- include/linux/mailbox/nxp-llce/llce_mailbox.h | 4 +- include/linux/pcs/fsl-s32gen1-xpcs.h | 51 + include/linux/phy.h | 4 + include/soc/s32/revision.h | 47 + include/soc/s32/revision_defs.h | 18 + 94 files changed, 7892 insertions(+), 2728 deletions(-) create mode 100644 Documentation/devicetree/bindings/nvmem/fsl,s32-siul2-nvmem.yaml create mode 100644 Documentation/devicetree/bindings/phy/fsl,s32gen1-serdes.yaml create mode 100644 Documentation/devicetree/bindings/power/reset/fsl,s32gen1-prstc.txt delete mode 100644 Documentation/devicetree/bindings/power/reset/fsl,s32gen1-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/fsl,s32gen1-reset.yaml create mode 100644 drivers/clk/s32/s32-gen1/mc_me.h create mode 100644 drivers/clk/s32/s32-gen1/rdc.h create mode 100644 drivers/clk/s32/s32-gen1/rgm.h create mode 100644 drivers/net/pcs/fsl-s32gen1-xpcs.c create mode 100644 drivers/net/phy/nxp-c45-tja11xx.c create mode 100644 drivers/nvmem/s32_siul2_nvmem.c create mode 100644 drivers/phy/freescale/phy-fsl-s32gen1-serdes.c create mode 100644 drivers/reset/reset-s32gen1.c create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h delete mode 100644 include/dt-bindings/clock/s32g274a-scmi-clock.h create mode 100644 include/dt-bindings/net/fsl-s32g-pfeng.h create mode 100644 include/dt-bindings/phy/phy-s32gen1-serdes.h create mode 100644 include/dt-bindings/reset/s32g-scmi-reset.h create mode 100644 include/dt-bindings/reset/s32gen1-scmi-reset.h create mode 100644 include/dt-bindings/reset/s32r45-scmi-reset.h create mode 100644 include/linux/mailbox/nxp-llce/llce_fw_interface.h create mode 100644 include/linux/pcs/fsl-s32gen1-xpcs.h create mode 100644 include/soc/s32/revision.h create mode 100644 include/soc/s32/revision_defs.h
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