merged.
Bruce
In message: [linux-yocto] [kernel v5.10/standard/nxp-sdk-5.4/nxp-imx8][PATCH]
arm64: dts: imx8: Modify csi0 and csi1esc_lpcg and core_lpcg clock power domain
on 28/05/2021 Xiaolei Wang wrote:
> Because commit f2bddbbe40c9 ("irqchip: imx-irqsteer: Block the runtime PM")
> prohibits the interrupt the interrupt device from entering the runtime PM
> mode,
> so the two power domains it attaches cannot enter the runtime PM, which causes
> the two domains to not enter the low power mode. These two domains power
> domain
> directly enters the power off state when the system suspend is manually
> executed,
> but because the csi1_esc_lpcg clock depends on IMX_SC_R_CSI_1, this panic
> appears.
>
> Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP
> Modules linked in:
> CPU: 0 PID: 409 Comm: sh Not tainted 5.10.37-yocto-standard #1
> Hardware name: Freescale i.MX8QM MEK (DT)
> pstate: 00000005 (nzcv daif -PAN -UAO -TCO BTYPE=--)
> pc : imx_clk_lpcg_scu_suspend+0x70/0x7c
> lr : imx_clk_lpcg_scu_suspend+0x6c/0x7c
> sp : ffff800012ebba30
> x29: ffff800012ebba30 x28: 0000000000000002
> x27: ffff800010892b04 x26: ffff8000119a0e40
> x25: ffff8000117c9f54 x24: ffff800011916020
> x23: ffff800011a7cf60 x22: 0000000000000000
> x21: ffff000810ba5810 x20: ffff000810ba5810
> x19: ffff00081102cd00 x18: 0000000000000020
> x17: 0000000000000000 x16: 0000000000000000
> x15: 000000005904170b x14: ffff000810dab048
> x13: 0000000000000000 x12: fffffffffffca05f
> x11: 0101010101010101 x10: ffff800011825ff8
> x9 : ffff8000100aa0e0 x8 : ffff8000117ca5a8
> x7 : ffff8000118225a8 x6 : 0000000000003a50
> x5 : 0000000000000000 x4 : 0000000000000000
> x3 : 0000000000000000 x2 : b9cdc3c7695eb800
> x1 : 0000000000000000 x0 : ffff800011b4501c
> Call trace:
> imx_clk_lpcg_scu_suspend+0x70/0x7c
> pm_generic_suspend_noirq+0x38/0x50
> genpd_finish_suspend+0xb8/0x140
> genpd_suspend_noirq+0x20/0x30
> dpm_run_callback+0x50/0x1c0
> __device_suspend_noirq+0xec/0x244
> dpm_noirq_suspend_devices+0x11c/0x320
> dpm_suspend_noirq+0x30/0xa4
> suspend_devices_and_enter+0x3b0/0x8a0
> pm_suspend+0x288/0x330
> state_store+0x98/0x120
> kobj_attr_store+0x1c/0x30
> sysfs_kf_write+0x50/0x60
> kernfs_fop_write_iter+0x124/0x1b4
> new_sync_write+0xf0/0x18c
> vfs_write+0x21c/0x280
> ksys_write+0x78/0x104
> __arm64_sys_write+0x28/0x3c
> el0_svc_common.constprop.0+0x9c/0x1f0
> do_el0_svc+0x78/0xa0
> el0_svc+0x20/0x30
> el0_sync_handler+0x1a4/0x1b0
> el0_sync+0x178/0x180
> Code: aa0003e1 91158040 941e6a79 f9400e60 (b9400000)
> ---[ end trace 64df5c6b48a8ae0a ]---
>
> Signed-off-by: Xiaolei Wang <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> index c7be9fdc4df0..32f2ea5f60db 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> @@ -37,7 +37,7 @@ csi0_core_lpcg: clock-controller@58223018 {
> clocks = <&clk IMX_SC_R_CSI_0 IMX_SC_PM_CLK_PER>;
> bit-offset = <16>;
> clock-output-names = "csi0_lpcg_core_clk";
> - power-domains = <&pd IMX_SC_R_ISI_CH0>;
> + power-domains = <&pd IMX_SC_R_CSI_0>;
> };
>
> csi0_esc_lpcg: clock-controller@5822301c {
> @@ -47,7 +47,7 @@ csi0_esc_lpcg: clock-controller@5822301c {
> clocks = <&clk IMX_SC_R_CSI_0 IMX_SC_PM_CLK_MISC>;
> bit-offset = <16>;
> clock-output-names = "csi0_lpcg_esc_clk";
> - power-domains = <&pd IMX_SC_R_ISI_CH0>;
> + power-domains = <&pd IMX_SC_R_CSI_0>;
> };
>
> csi1_core_lpcg: clock-controller@58243018 {
> @@ -57,7 +57,7 @@ csi1_core_lpcg: clock-controller@58243018 {
> clocks = <&clk IMX_SC_R_CSI_1 IMX_SC_PM_CLK_PER>;
> bit-offset = <16>;
> clock-output-names = "csi1_lpcg_core_clk";
> - power-domains = <&pd IMX_SC_R_ISI_CH0>;
> + power-domains = <&pd IMX_SC_R_CSI_1>;
> };
>
> csi1_esc_lpcg: clock-controller@5824301c {
> @@ -67,7 +67,7 @@ csi1_esc_lpcg: clock-controller@5824301c {
> clocks = <&clk IMX_SC_R_CSI_1 IMX_SC_PM_CLK_MISC>;
> bit-offset = <16>;
> clock-output-names = "csi1_lpcg_esc_clk";
> - power-domains = <&pd IMX_SC_R_ISI_CH0>;
> + power-domains = <&pd IMX_SC_R_CSI_1>;
> };
>
> pi0_pxl_lpcg: clock-controller@58263018 {
> --
> 2.25.1
>
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