If PCIe ASPM is enabled, this will cause the link status of the TI J721e PCIe controller and external PCIe device card to not be up, a series pcie read and write access will fail. To workaround this issue, disable TI J721E PCIe ASPM configuration.
Signed-off-by: Xulin Sun <[email protected]> --- bsp/ti-j72xx/ti-j72xx.cfg | 1 + 1 file changed, 1 insertion(+) diff --git a/bsp/ti-j72xx/ti-j72xx.cfg b/bsp/ti-j72xx/ti-j72xx.cfg index f2761ade..e42baa0d 100755 --- a/bsp/ti-j72xx/ti-j72xx.cfg +++ b/bsp/ti-j72xx/ti-j72xx.cfg @@ -53,6 +53,7 @@ CONFIG_PCI_KEYSTONE_EP=y CONFIG_PHY_CADENCE_TORRENT=y CONFIG_PHY_CADENCE_SIERRA=y CONFIG_BLK_DEV_NVME=y +# CONFIG_PCIEASPM is not set # # MMC/SD/SDIO Host Controller Drivers -- 2.36.1
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