Hi Bruce, I've rebased the 216 new patches from NXP SDK bsp33 repo for v5.10/standard/preempt-rt/nxp-sdk-5.10/nxp-s32g2xx, would you please help merge these patches into the v5.10/standard/preempt-rt/nxp-sdk-5.10/nxp-s32g2xx branch?
Thanks, Adrian The following changes since commit cfb2b4e6fea18151bf99ba8d02ec0009db74c8db: Merge branch 'v5.10/standard/base' into v5.10/standard/preempt-rt/nxp-sdk-5.10/nxp-s32g2xx (2023-02-17 16:24:16 -0500) are available in the Git repository at: https://github.com/azaharia-wr/linux-yocto bsp33-rt for you to fetch changes up to ce12a93c37c91dbdaacf2dd349b7a9cc60afafc8: pinctrl: s32: clean up previous pin configuration (2023-02-27 13:32:04 +0200) ---------------------------------------------------------------- Andrei Botila (2): dt-bindings: clock: pit: rename compatible string clocksource: pit: rename compatible string Andrei Cherechesu (7): drivers/perf: nxf-s32-ddr-perf: Remove unexisting events drivers/perf: nxp-s32-ddr-perf: Use enum for perf event IDs drivers/perf: nxp-s32-ddr-perf: Switch to using GENMASK drivers/perf: nxp-s32-ddr-perf: Use unsigned for config attributes drivers/perf: nxp-s32-ddr-perf: Handle extra CP parameter drivers/perf: nxp-s32-ddr-perf: Remove "axi-id" and "axi-mask" drivers/perf: nxp-s32-ddr-perf: Rename "selfresh" to "self-refresh" Andrei Stefanescu (18): gpio: s32: update driver compatible doc: gpio: s32: change compatible dt-bindings: s32: add siul2 definitions dts: s32: unify SIUL2 modules doc: pinctrl: s32: unify compatibles doc: gpio: change compatible for s32r45 pinctrl: s32: update driver to match dts s32: gpio,pinctrl: re-enable gpio support dt-bindings: gpio: remove S32GEN1_INVALID_GPIO gpio: s32: enable EIRQ support s32: rename pinctrl and gpio drivers gpio: s32: remove hardcoded eirq configuration gpio: s32: refactor SIUL2 info s32: gpio: restrict lock to only protect bitmaps pinctrl: protect `gpio_configs` list with lock pinctrl: s32: protect MSCRs/IMCRs with lock pinctrl: s32: make `s32_get_pin_conf` compute mask gpio: s32: replace `regmap_siul2_accessible` with `regmap_access_tables` Bogdan Folea (12): dts: s32: rename "fsl,s32gen1-hse" to "nxp,s32cc-hse" dt-bindings: crypto: hse: rename compatible string crypto: hse: refactor MU configuration docs: crypto: hse: update kerneldoc uio: hse: refactor MU configuration uio: hse: fix driver internal memory mapping crypto: hse: remove firmware older than v1.0.0 support crypto: hse: remove deprecated key wrapping support crypto: hse: make RNG max cache size configurable crypto: hse: remove firmware version attr workaround crypto: hse: enable cipher block mode AES-OFB crypto: hse: update firmware ABI to v0.21.0 Bogdan Roman (3): s32: gpio: update naming for s32cc gpio s32: gpio: update siul2 gpio device-tree binding documentation s32cc: add no-1-8-v property for all rdb boards Ciprian Costea (8): s32cc: Add distinct support for S32G2/S32G3 and EVB/EVB3 s32cc: doc: Update compatible string for S32G3 platforms dt-bindings: Add definitions for reserved ddr errata memory region ddr: err050543: Add STR support s32cc: dts: Refactor 'reserved-memory' node usage s32-gen1: flexcan: Update bit timing parameters s32cc: pcie: Fix incorrect nvram cell name s32g2/s32r: pcie: Do not report error on reading 'pcie_variant_bits' Claudiu Manoil (6): dts: fsl-s32g: pfe: Place BMU2 inside an internal SRAM memory region dts: fsl-s32g: pfe: Add memory-region-names dts: fsl-s32g: pfe: Add reserved-memory node for the routing table dt-bindings: fsl-pfeng: Add reserved-memory node binding for the routing table arm64: dts: s32g: pfe: Remove reserved-memory support from the PFE Slave driver dt-bindings: net: pfe: Remove reserved-memory reference for PFE Slave driver Dan Nica (1): s32gen1: Move no-1-8-v to the board .dts Dorin Ionita (1): gmac: s32: Deactivate split header capabilities Ghennadi Procopciuc (116): drivers: spi: Rename 'fsl,s32gen1-qspi' to 'nxp,s32cc-qspi' Documentation: spi: Rename 'fsl,s32gen1-qspi' to 'nxp,s32cc-qspi' drivers/net: s32cc: Rename 'fsl,s32cc-dwmac' to 'nxp,s32cc-dwmac' dt-bindigns: net: Rename "fsl,s32cc-dwmac" to "net,s32cc-dwmac" drivers: pcie: Rename "fsl,s32gen1-pcie" to "nxp,s32cc-pcie" dt-bindings: pci: Rename fsl,s32-pcie to nxp,s32-pcie drivers: phy: Rename "fsl,s32gen1-serdes" to "nxp,s32cc-serdes" dt-bindings: phy: Rename "fsl,s32gen1-serdes" to "nxp,s32cc-serdes" drivers: mmc: Rename "fsl,s32gen1-usdhc" to "nxp,s32cc-usdhc" dt-bindings: mmc: Rename "fsl,s32gen1-usdhc" to "nxp,s32cc-usdhc" drivers: tty/serial: Update LinFlex compatible string Documentation: devicetree: Update LinFlex compatible tty: serial: Update LinFlex compatible to nxp,s32-cc-linflexuart devicetree: bindings: Rename LinFlex compatible spi: Update S32CC DSPI compatible to nxp,s32cc-dspi devicetree: bindings: Rename S32CC DSPI compatible spi: Add platform dependent compatible string for S32CC QSPI devicetree: bindings: Add S32CC platforms compatible for QSPI i2c: Update S32CC compatible to nxp,s32cc-i2c devicetree: bindings: Update S32CC I2C compatible dt-bindings: Update compatibles for NXP S32 boards arm64: dts: Update root node compatible & model clk: Remove S32 drivers reset: Remove S32 reset driver mfd: Remove MC_RGM syscon mfd: Remove MC_ME syscon power: Remove S32CC power reset driver dts: S32CC device tree cleanup dts: Rename s32g274a.dtsi to s32g2.dtsi dts: Rename s32-gen1.dtsi to s32cc.dtsi dts: Correct LLCE node definitions dts: s32cc: Remove leading "0x" from reserved memory ranges nodes rtc: Add clocks to S32CC RTC driver dt-bindings: rtc: Add clocks to S32CC RTC description arm64: dts: Backport s32cc changes arm64: dts: Make use of interrupt and GIC macros Revert "s32gen1: Add workaround for A53 GPR model event generation" arm64: dts: s32cc: Make RTC node part of the soc node arm64: dts: s32cc: Make DDR GPR part of the soc node arm64: dts: s32cc: Make SIUL2 part of the soc node arm64: dts: s32cc: Make TMU part of the soc node arm64: dts: s32cc: Make SWT instances part of the soc node arm64: dts: s32cc: Make STM instances part of the soc node arm64: dts: s32cc: Make eDMA instances part of the soc node arm64: dts: s32cc: Make QSPI part of the soc node arm64: dts: s32cc: Make PIT instances part of the soc node arm64: dts: s32cc: Make MSCM part of the soc node arm64: dts: s32cc: Make FlexCAN instances part of the soc node arm64: dts: s32cc: Make LinFLEX instances part of the soc node arm64: dts: s32cc: Make SPI instances part of the soc node arm64: dts: s32cc: Make I2C instances part of the soc node arm64: dts: s32cc: Make FTM instances part of the soc node arm64: dts: s32cc: Make ADC instances part of the soc node arm64: dts: s32cc: Make HSE part of the soc node arm64: dts: s32cc: Make uSDHC part of the soc node arm64: dts: s32cc: Make FCCU part of the soc node arm64: dts: s32cc: Make GMAC part of the soc node arm64: dts: s32cc: Make DDRSS nodes part of the soc node arm64: dts: s32cc: Make PCIe instances part of the soc node arm64: dts: s32cc: Make SerDes instances part of the soc node arm64: dts: s32cc: Remove unused SIUL2.1 node arm64: dts: s32cc: Make GIC part of the soc node arm64: dts: s32cc: Remove virtio block arm64: dts: s32g: Make SIUL2 instances part of the soc node arm64: dts: s32g: Make LLCE part of the soc node arm64: dts: s32g: Make USB part of the soc node arm64: dts: s32r45: Make SIUL2 instances part of the soc node arm64: dts: s32r45: Make CAN instances part of the soc node arm64: dts: s32r45: Make GMAC1 part of the soc node arm64: dts: s32g: Make PFE part of the soc node arm64: dts: s32g3: Make GIC part of the soc node arm64: dts: s32g3: Make SWT instances part of the soc node arm64: dts: s32g3: Make STM instances part of the soc node s32gen1: Increase reserved mem and EP BAR 2 to 100MB Revert "s32gen1: Increase reserved mem and EP BAR 2 to 100MB" s32cc: add no-1-8-v property for all evb boards doc: dt-bindings: Rename S32CC RTC compatible drivers: rtc: Rename S32CC RTC compatible doc: dt-bindings: Rename S32CC PCIe shared memory compatible arm64: dts: Rename S32CC PCIe shared memory compatible doc: dt-bindings: Rename S32CC TMU compatible drivers: thermal: Rename S32CC TMU compatible doc: dt-bindings: Rename S32CC watchdog compatible drivers: watchdog: Rename S32CC WDT compatible doc: dt-bindings: Rename S32CC STM compatible drivers: clocksource: Rename S32CC STM compatible doc: dt-bindings: Rename S32CC STM global compatible drivers: clocksource: Rename S32CC STM global compatible doc: dt-bindings: Rename S32CC eDMA compatible drivers: dma: Rename S32CC eDMA compatible arm64: dts: s32cc: Remove MSCM node doc: dt-bindings: Rename S32CC FlexCAN compatible drivers: can: Rename S32CC FlexCAN compatible drivers: pwm: Rename S32CC FTM compatible doc: dt-bindings: Rename S32CC FCCU compatible drivers: misc: Rename S32CC FCCU compatible drivers: perf: Rename S32CC DDR perf compatible arm64: dts: s32r45: Add PTP clock to GMAC1 node pinctrl: s32cc: Remove the usage of 'gpiogrp' group dt-bindings: pinctrl: Remove unused defines pinctrl: s32cc: Place each group into a function block pinctrl: s32cc: Decouple gpio pin from s32_pin dts: s32cc: Add pinctrl bindings definition pinctrl: s32cc: Use pinconf generic interface for pinmuxing dt-bindings: pinctrl: s32cc: Remove unused headers pinctrl: s32cc: Use less configs for a pinctrl group gpio: s32: Use devm interface to init regmaps gpio: s32cc: Enable set config callback gpio: Fix the way a SIUL2 register is declared accessible doc: misc: Add bindings for NXP S32CC MSCM arm64: dts: s32cc: Readd MSCM node gpio: s32cc: Set value before direction gpio: s32cc: Correct the out pad accessibility pcie: s32cc: Don't fail if 'pcie_variant_bits' property isn't present arm64: dts: s32cc: Update out and input pads ranges for siul21 i2c: imx: Remove custom recovery GPIO initialization Ionut Vicovan (22): s32:pcie:dma: Refactor and reduce DMA support s32g:pcie:dma: Add support for unrolled channel registers s32v:pcie: Extract user space support code to separate source files s32g:pcie: Add userspace access support for S32G s32:pcie: Use the same logging for all PCIe drivers s32g:pcie:dma: Add start_dma callback s32g:pcie:epf:dma: Enable epf test framework to use start_dma callback pci:s32g3:dma: Update EPF test RC module to support G3 pcie:s32:dma: Fix single buffer DMA transfer pcie:s32: Make the driver compatible to the shared mem test application pcie:s32:dma:device-tree: Fix DMA interrupt on R45 for PCIe1 pci:s32gen1: Document shared-mem property pci:s32gen1: Get shared memory for pcie use from device tree s32:pcie: Fix ranges for PCIe1 s32:pcie: Remove some invalid references to S32V config options s32:pci:epf: Fix Device ID for S32G3 s32:pci:device-tree: Remove hardcodings in interrupt definitions s32:emu:dts: Remove pcie nodes for reserved memory above 1GB s32:pcie: Refactor the timeout logic for PCIe configuration s32:pcie: Removed some bit/mask hardcodings s32:pcie:epf: Enable MSI-X support s32g3: pcie: Set correct PCI device ID and vendor ID Jan Petrous (5): dt-bindings: net: pfe: add dt bindings documentation dts: s32g: pfe: update for version RTM 1.0.0 dt-bindings: net: pfe: remove unused header dts: s32g: pfe: update for version RTM 1.0.0, Master/Slave dts: s32g: pfe: preserve compatibility with old u-boot eth fixup Radu Pirea (8): s32: gpio: add gpio pin names mailbox: llce: fix frame id mailbox: llce: fix short mb index net: can: llce can: fix switching beteween CAN and CAN FD net: can: llce can: do not print errors if logging is not supported dts: s32gxxxa-evb: disable llcecan14 and llcecan15 net: can: llce can: restrict logging enablement pinctrl: s32: clean up previous pin configuration Radu Pirea (NXP OSS) (4): net: can: llce_can: add netdev notifier phy: nxp-c45-tja11xx: check for FUSA_PASS irq bindings: clock s32cc: add CMU clk mailbox: llce: upgrade to LLCE 1.0.4 Vijaya Krishna Nivarthi (1): serial: core: Do stop_rx in suspend path for console if console_suspend is disabled Vlad Pelin (2): secboot: change hse_reserved node to match atf dt-bindings: uio: add s32cc-hse-rmem info Documentation/crypto/fsl/hse.rst | 16 +- .../devicetree/bindings/arm/nxp/nxp-boards.yaml | 7 +- .../devicetree/bindings/clock/fsl-pit.yaml | 4 +- ...l-stm-global.yaml => nxp-s32cc-stm-global.yaml} | 4 +- .../clock/{fsl-stm.yaml => nxp-s32cc-stm.yaml} | 4 +- .../clock/s32gen1-clock-generation-modules.yaml | 50 - .../devicetree/bindings/crypto/nxp-hse.yaml | 8 +- Documentation/devicetree/bindings/dma/fsl-edma.txt | 4 +- Documentation/devicetree/bindings/fsl-pfeng.txt | 25 +- .../gpio/{gpio-s32gen1.yaml => gpio-s32cc.yaml} | 12 +- Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 2 +- .../devicetree/bindings/mfd/fsl,s32gen1-mc_me.yaml | 37 - .../bindings/mfd/fsl,s32gen1-mc_rgm.yaml | 43 - .../misc/{fsl,fccu.yaml => nxp-s32cc-fccu.yaml} | 4 +- .../devicetree/bindings/misc/nxp-s32cc-mscm.yaml | 36 + .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 2 +- .../devicetree/bindings/net/can/fsl,flexcan.yaml | 2 +- .../{fsl,s32cc-dwmac.yaml => nxp,s32cc-dwmac.yaml} | 6 +- .../devicetree/bindings/net/nxp,s32g-pfe.yaml | 245 ++++ .../pci/{fsl,s32-pcie.yaml => nxp,s32-pcie.yaml} | 11 +- ...l,s32gen1-serdes.yaml => nxp,s32cc-serdes.yaml} | 6 +- .../bindings/pinctrl/nxp,s32cc-siul2.yaml | 6 +- .../bindings/power/reset/fsl,s32gen1-prstc.txt | 15 - .../reserved-memory/nxp,s32cc-hse-rmem.yaml | 45 + .../devicetree/bindings/rtc/fsl,s32gen1-rtc.yaml | 43 +- .../bindings/serial/fsl-linflexuart.yaml | 4 +- .../devicetree/bindings/spi/spi-fsl-dspi.txt | 2 +- .../devicetree/bindings/spi/spi-fsl-qspi.txt | 2 +- .../devicetree/bindings/thermal/s32-thermal.yaml | 4 +- .../{fsl-sac58r-wdt.yaml => nxp-s32cc-wdt.yaml} | 4 +- arch/arm64/Kconfig.platforms | 11 - arch/arm64/boot/dts/freescale/Makefile | 28 +- arch/arm64/boot/dts/freescale/fsl-s32-gen1.dtsi | 1131 ------------------ arch/arm64/boot/dts/freescale/fsl-s32g.dtsi | 1151 ------------------ .../boot/dts/freescale/fsl-s32g274a-bluebox3.dts | 521 -------- arch/arm64/boot/dts/freescale/fsl-s32g274a-emu.dts | 368 ------ .../arm64/boot/dts/freescale/fsl-s32g274a-rdb2.dts | 25 - .../boot/dts/freescale/fsl-s32g274a-simulator.dts | 414 ------- arch/arm64/boot/dts/freescale/fsl-s32g274a.dtsi | 27 - arch/arm64/boot/dts/freescale/fsl-s32g2xxa-evb.dts | 13 - arch/arm64/boot/dts/freescale/fsl-s32g3.dtsi | 169 --- .../arm64/boot/dts/freescale/fsl-s32g399a-rdb3.dts | 31 - arch/arm64/boot/dts/freescale/fsl-s32g3xxa-evb.dts | 28 - .../arm64/boot/dts/freescale/fsl-s32gxxxa-evb.dtsi | 1018 ---------------- .../arm64/boot/dts/freescale/fsl-s32gxxxa-rdb.dtsi | 933 --------------- arch/arm64/boot/dts/freescale/fsl-s32r45-emu.dts | 332 ------ arch/arm64/boot/dts/freescale/fsl-s32r45-evb.dts | 711 ----------- .../boot/dts/freescale/fsl-s32r45-simulator.dts | 342 ------ arch/arm64/boot/dts/freescale/fsl-s32r45.dtsi | 287 ----- arch/arm64/boot/dts/freescale/s32cc.dtsi | 1052 +++++++++++++++++ arch/arm64/boot/dts/freescale/s32g-pfe-slave.dtsi | 87 ++ arch/arm64/boot/dts/freescale/s32g-pfe.dtsi | 168 +++ arch/arm64/boot/dts/freescale/s32g.dtsi | 1000 ++++++++++++++++ arch/arm64/boot/dts/freescale/s32g2.dtsi | 27 + .../arm64/boot/dts/freescale/s32g274a-bluebox3.dts | 532 +++++++++ arch/arm64/boot/dts/freescale/s32g274a-emu.dts | 162 +++ .../boot/dts/freescale/s32g274a-rdb2-pfems.dts | 19 + arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 10 + arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtsi | 37 + .../boot/dts/freescale/s32g274a-simulator.dts | 164 +++ .../boot/dts/freescale/s32g2xxa-evb-pfems.dts | 18 + arch/arm64/boot/dts/freescale/s32g2xxa-evb.dts | 8 + arch/arm64/boot/dts/freescale/s32g2xxa-evb.dtsi | 26 + arch/arm64/boot/dts/freescale/s32g3.dtsi | 160 +++ .../{fsl-s32g399a-emu.dts => s32g399a-emu.dts} | 23 +- .../boot/dts/freescale/s32g399a-rdb3-pfems.dts | 19 + arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts | 9 + arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtsi | 45 + .../boot/dts/freescale/s32g3xxa-evb-pfems.dts | 18 + arch/arm64/boot/dts/freescale/s32g3xxa-evb.dts | 6 + arch/arm64/boot/dts/freescale/s32g3xxa-evb.dtsi | 40 + .../boot/dts/freescale/s32g3xxa-evb3-pfems.dts | 15 + arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dts | 6 + arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dtsi | 40 + arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi | 1030 ++++++++++++++++ arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi | 884 ++++++++++++++ arch/arm64/boot/dts/freescale/s32r45-emu.dts | 142 +++ arch/arm64/boot/dts/freescale/s32r45-evb.dts | 733 ++++++++++++ arch/arm64/boot/dts/freescale/s32r45-simulator.dts | 153 +++ arch/arm64/boot/dts/freescale/s32r45.dtsi | 245 ++++ arch/arm64/kernel/smp_spin_table.c | 69 +- drivers/clk/Kconfig | 1 - drivers/clk/Makefile | 1 - drivers/clk/s32/Kconfig | 4 - drivers/clk/s32/Makefile | 2 - drivers/clk/s32/clk-core.c | 57 - drivers/clk/s32/clk.h | 118 -- drivers/clk/s32/s32-gen1/Makefile | 4 - drivers/clk/s32/s32-gen1/cgm_div.c | 144 --- drivers/clk/s32/s32-gen1/cgm_mux.c | 141 --- drivers/clk/s32/s32-gen1/clk-dfs.c | 303 ----- drivers/clk/s32/s32-gen1/clk-plldig.c | 521 -------- drivers/clk/s32/s32-gen1/clk.c | 1123 ------------------ drivers/clk/s32/s32-gen1/clk.h | 67 -- drivers/clk/s32/s32-gen1/dfs.h | 84 -- drivers/clk/s32/s32-gen1/fxosc.c | 156 --- drivers/clk/s32/s32-gen1/mc_cgm.h | 142 --- drivers/clk/s32/s32-gen1/mux.c | 60 - drivers/clk/s32/s32-gen1/mux.h | 33 - drivers/clk/s32/s32-gen1/part_block.c | 138 --- drivers/clk/s32/s32-gen1/pll.h | 120 -- drivers/clk/s32/s32-gen1/pll_mux.c | 36 - drivers/clk/s32/s32-gen1/pll_mux.h | 22 - drivers/clk/s32/s32-gen1/rdc.h | 15 - drivers/clocksource/fsl_global_time.c | 2 +- drivers/clocksource/timer-fsl-stm.c | 2 +- drivers/clocksource/timer-vf-pit.c | 4 +- drivers/crypto/hse/Kconfig | 58 +- drivers/crypto/hse/Makefile | 5 +- drivers/crypto/hse/hse-abi.h | 9 +- drivers/crypto/hse/hse-aead.c | 174 +-- drivers/crypto/hse/hse-core.c | 106 +- drivers/crypto/hse/hse-core.h | 4 +- drivers/crypto/hse/hse-mu.c | 10 +- drivers/crypto/hse/hse-mu.h | 4 +- drivers/crypto/hse/hse-rng.c | 12 +- drivers/crypto/hse/hse-skcipher.c | 12 +- drivers/ddr/s32-cc/ddr.c | 73 +- drivers/dma/fsl-edma.c | 2 +- drivers/gpio/Kconfig | 10 +- drivers/gpio/Makefile | 2 +- drivers/gpio/gpio-siul2-s32cc.c | 1248 ++++++++++++++++++++ drivers/gpio/gpio-siul2-s32gen1.c | 1057 ----------------- drivers/i2c/busses/i2c-imx.c | 21 +- drivers/mailbox/llce-mailbox.c | 27 +- drivers/mfd/Kconfig | 16 - drivers/mfd/Makefile | 2 - drivers/mfd/s32gen1-mc_me.c | 151 --- drivers/mfd/s32gen1-mc_rgm.c | 116 -- drivers/misc/fccu/fsl_fccu.c | 2 +- drivers/misc/pci_endpoint_test.c | 30 +- drivers/mmc/host/sdhci-esdhc-imx.c | 2 +- drivers/net/can/flexcan.c | 12 +- drivers/net/can/llce/llce_can.c | 306 ++++- drivers/net/can/llce/llce_can_common.c | 37 +- drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c | 4 +- drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 15 +- drivers/net/ethernet/stmicro/stmmac/hwif.c | 1 + drivers/net/phy/nxp-c45-tja11xx.c | 23 +- drivers/pci/controller/Kconfig | 32 +- drivers/pci/controller/dwc/Makefile | 2 +- drivers/pci/controller/dwc/pci-dma-s32.c | 751 +++++------- drivers/pci/controller/dwc/pci-dma-s32.h | 228 ++-- drivers/pci/controller/dwc/pci-ioctl-s32.c | 217 ++++ drivers/pci/controller/dwc/pci-ioctl-s32.h | 90 +- drivers/pci/controller/dwc/pci-s32gen1.c | 383 ++++-- drivers/pci/controller/dwc/pci-s32gen1.h | 57 +- drivers/pci/controller/dwc/pcie-designware-ep.c | 20 + drivers/pci/controller/dwc/pcie-designware.h | 5 + drivers/pci/endpoint/functions/pci-epf-test.c | 102 +- drivers/pci/endpoint/pci-epc-core.c | 34 + drivers/perf/nxp-s32-ddr-perf.c | 160 ++- drivers/phy/freescale/phy-fsl-s32gen1-serdes.c | 4 +- drivers/pinctrl/freescale/Kconfig | 24 +- drivers/pinctrl/freescale/Makefile | 6 +- drivers/pinctrl/freescale/pinctrl-s32.h | 11 +- ...inctrl-s32-gen1-core.c => pinctrl-s32cc-core.c} | 770 ++++++++---- drivers/pinctrl/freescale/pinctrl-s32g.c | 29 +- drivers/pinctrl/freescale/pinctrl-s32r45.c | 28 +- drivers/power/reset/Kconfig | 7 - drivers/power/reset/Makefile | 1 - drivers/power/reset/s32gen1-reboot.c | 121 -- drivers/pwm/pwm-fsl-ftm.c | 2 +- drivers/reset/Kconfig | 10 - drivers/reset/Makefile | 3 - drivers/reset/reset-s32gen1.c | 538 --------- drivers/rtc/rtc-s32gen1.c | 166 ++- drivers/spi/spi-fsl-dspi.c | 4 +- drivers/spi/spi-fsl-qspi.c | 6 +- drivers/thermal/s32_thermal.c | 2 +- drivers/tty/serial/fsl_linflexuart.c | 6 +- drivers/tty/serial/serial_core.c | 11 +- drivers/uio/Kconfig | 42 +- drivers/uio/uio_hse.c | 50 +- drivers/watchdog/sac58r_wdt.c | 2 +- include/dt-bindings/clock/s32gen1-scmi-clock.h | 7 +- include/dt-bindings/ddr-errata/s32-ddr-errata.h | 13 + include/dt-bindings/memory/s32-siul2.h | 23 + include/dt-bindings/net/fsl-s32g-pfeng.h | 18 - include/dt-bindings/net/s32g-pfe.h | 20 + include/dt-bindings/pinctrl/s32-gen1-pinctrl.h | 56 - include/dt-bindings/pinctrl/s32cc-pinfunc.h | 31 + include/dt-bindings/pinctrl/s32g-pinctrl.h | 1063 ----------------- include/dt-bindings/pinctrl/s32r45-pinctrl.h | 599 ---------- include/linux/can/dev/llce_can_common.h | 2 + include/linux/mailbox/nxp-llce/llce_can.h | 173 ++- include/linux/mailbox/nxp-llce/llce_fw_interface.h | 130 +- include/linux/mailbox/nxp-llce/llce_fw_version.h | 14 +- .../linux/mailbox/nxp-llce/llce_interface_config.h | 18 +- include/linux/mailbox/nxp-llce/llce_sema42.h | 132 +-- include/linux/pci-epc.h | 6 + include/uapi/linux/pcitest.h | 1 + tools/pci/pcitest.c | 17 +- 193 files changed, 11594 insertions(+), 16644 deletions(-) rename Documentation/devicetree/bindings/clock/{fsl-stm-global.yaml => nxp-s32cc-stm-global.yaml} (92%) rename Documentation/devicetree/bindings/clock/{fsl-stm.yaml => nxp-s32cc-stm.yaml} (93%) delete mode 100644 Documentation/devicetree/bindings/clock/s32gen1-clock-generation-modules.yaml rename Documentation/devicetree/bindings/gpio/{gpio-s32gen1.yaml => gpio-s32cc.yaml} (91%) delete mode 100644 Documentation/devicetree/bindings/mfd/fsl,s32gen1-mc_me.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/fsl,s32gen1-mc_rgm.yaml rename Documentation/devicetree/bindings/misc/{fsl,fccu.yaml => nxp-s32cc-fccu.yaml} (97%) create mode 100644 Documentation/devicetree/bindings/misc/nxp-s32cc-mscm.yaml rename Documentation/devicetree/bindings/net/{fsl,s32cc-dwmac.yaml => nxp,s32cc-dwmac.yaml} (96%) create mode 100644 Documentation/devicetree/bindings/net/nxp,s32g-pfe.yaml rename Documentation/devicetree/bindings/pci/{fsl,s32-pcie.yaml => nxp,s32-pcie.yaml} (94%) rename Documentation/devicetree/bindings/phy/{fsl,s32gen1-serdes.yaml => nxp,s32cc-serdes.yaml} (96%) delete mode 100644 Documentation/devicetree/bindings/power/reset/fsl,s32gen1-prstc.txt create mode 100644 Documentation/devicetree/bindings/reserved-memory/nxp,s32cc-hse-rmem.yaml rename Documentation/devicetree/bindings/watchdog/{fsl-sac58r-wdt.yaml => nxp-s32cc-wdt.yaml} (93%) delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32-gen1.dtsi delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g.dtsi delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g274a-bluebox3.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g274a-emu.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g274a-rdb2.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g274a-simulator.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g274a.dtsi delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g2xxa-evb.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g3.dtsi delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g399a-rdb3.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32g3xxa-evb.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32gxxxa-evb.dtsi delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32gxxxa-rdb.dtsi delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32r45-emu.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32r45-evb.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32r45-simulator.dts delete mode 100644 arch/arm64/boot/dts/freescale/fsl-s32r45.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32cc.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g-pfe-slave.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g-pfe.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-bluebox3.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-emu.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2-pfems.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-simulator.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb-pfems.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g3.dtsi rename arch/arm64/boot/dts/freescale/{fsl-s32g399a-emu.dts => s32g399a-emu.dts} (72%) create mode 100644 arch/arm64/boot/dts/freescale/s32g399a-rdb3-pfems.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb-pfems.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb3-pfems.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dts create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi create mode 100644 arch/arm64/boot/dts/freescale/s32r45-emu.dts create mode 100644 arch/arm64/boot/dts/freescale/s32r45-evb.dts create mode 100644 arch/arm64/boot/dts/freescale/s32r45-simulator.dts create mode 100644 arch/arm64/boot/dts/freescale/s32r45.dtsi delete mode 100644 drivers/clk/s32/Kconfig delete mode 100644 drivers/clk/s32/Makefile delete mode 100644 drivers/clk/s32/clk-core.c delete mode 100644 drivers/clk/s32/clk.h delete mode 100644 drivers/clk/s32/s32-gen1/Makefile delete mode 100644 drivers/clk/s32/s32-gen1/cgm_div.c delete mode 100644 drivers/clk/s32/s32-gen1/cgm_mux.c delete mode 100644 drivers/clk/s32/s32-gen1/clk-dfs.c delete mode 100644 drivers/clk/s32/s32-gen1/clk-plldig.c delete mode 100644 drivers/clk/s32/s32-gen1/clk.c delete mode 100644 drivers/clk/s32/s32-gen1/clk.h delete mode 100644 drivers/clk/s32/s32-gen1/dfs.h delete mode 100644 drivers/clk/s32/s32-gen1/fxosc.c delete mode 100644 drivers/clk/s32/s32-gen1/mc_cgm.h delete mode 100644 drivers/clk/s32/s32-gen1/mux.c delete mode 100644 drivers/clk/s32/s32-gen1/mux.h delete mode 100644 drivers/clk/s32/s32-gen1/part_block.c delete mode 100644 drivers/clk/s32/s32-gen1/pll.h delete mode 100644 drivers/clk/s32/s32-gen1/pll_mux.c delete mode 100644 drivers/clk/s32/s32-gen1/pll_mux.h delete mode 100644 drivers/clk/s32/s32-gen1/rdc.h create mode 100644 drivers/gpio/gpio-siul2-s32cc.c delete mode 100644 drivers/gpio/gpio-siul2-s32gen1.c delete mode 100644 drivers/mfd/s32gen1-mc_me.c delete mode 100644 drivers/mfd/s32gen1-mc_rgm.c create mode 100644 drivers/pci/controller/dwc/pci-ioctl-s32.c rename drivers/pinctrl/freescale/{pinctrl-s32-gen1-core.c => pinctrl-s32cc-core.c} (50%) delete mode 100644 drivers/power/reset/s32gen1-reboot.c delete mode 100644 drivers/reset/reset-s32gen1.c create mode 100644 include/dt-bindings/ddr-errata/s32-ddr-errata.h create mode 100644 include/dt-bindings/memory/s32-siul2.h delete mode 100644 include/dt-bindings/net/fsl-s32g-pfeng.h create mode 100644 include/dt-bindings/net/s32g-pfe.h delete mode 100644 include/dt-bindings/pinctrl/s32-gen1-pinctrl.h create mode 100644 include/dt-bindings/pinctrl/s32cc-pinfunc.h delete mode 100644 include/dt-bindings/pinctrl/s32g-pinctrl.h delete mode 100644 include/dt-bindings/pinctrl/s32r45-pinctrl.h
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