In message: [linux-yocto] [linux-yocto std kernel v5.15]: nxp-s32g: create new kernel branch for S32G platform based on SDK v5.15 kernel on 21/03/2023 Zhantao Tang wrote:
> Hi Bruce, > > Since S32G SDK is to use v5.15 as primary kernel version, we also need to > compatible with it too. Refer to the current S32G kernel branches name style > in linux-yocto, the new branch name for standard kernel is: > v5.15/standard/nxp-sdk-5.15/nxp-s32g > > And there are 685 patches from SDK v5.15 kernel for the new branch creation. > Would you please help to create the new standard kernel branch and merge these > patches into it? I scanned the diffstat and commit messages, and nothing jumped out as being really non-BSP specific. I keep hoping that the SDKs will stop touching common files, so that -stable merges are easier ... hopefully we are getting ther :) Both branches are now created and populated. Bruce > > Thanks, > Zhantao > > > The following changes since commit 99700bd79a36b1a0cea28fd65921b5973970fc88: > > Merge tag 'v5.15.98' into v5.15/standard/base (2023-03-07 23:06:34 -0500) > > are available in the Git repository at: > > https://github.com/zhantaotang/linux-yocto-std.git > v5.15/standard/nxp-sdk-5.15/nxp-s32g > > for you to fetch changes up to ebca89603c606d5f939b7e19735d93ef37583ecf: > > dt-bindings: net: pfe: update dt bindings documentation (2023-03-21 > 14:27:38 +0800) > > ---------------------------------------------------------------- > Andra-Teodora Ilie (5): > s32g274, s32r45: Add missing i2c pinmuxing > gpio: siul2-s32cc: Set pin direction first then the value > spi: fsl-dspi: Enable modified transfer protocol > dt-bindings: s32cc: Add A53 performance domain SCMI ID > dts: s32cc: Enable frequency scaling for A53 > > Andrei Botila (1): > ethernet: gmac: Add necessary cleanup for GMAC RX clock > > Andrei Cherechesu (18): > documentation: Add bindings for "nxp,s32cc-ddr" node > s32cc: ddr: Update Derating ERRATA code > drivers/perf: nxp-s32cc-ddr-perf: Clear counters after each event update > drivers/perf: nxp-s32cc-ddr-perf: Sort include statements > Documentation: Add ddr_gpr device-tree node bindings > drivers/perf: nxp-s32cc-ddr-perf: Enable counter0 interrupt via syscon > drivers/perf: nxp-s32cc-ddr-perf: Save counter status when disabling it > drivers/perf: nxp-s32cc-ddr-perf: Stop all counters on counter0 ovfl > drivers/perf: nxp-s32cc-ddr-perf: Check if IRQ triggered on counter0 > drivers/perf: nxp-s32cc-ddr-perf: Remove unexisting events > drivers/perf: nxp-s32cc-ddr-perf: Use enum for perf event IDs > drivers/perf: nxp-s32cc-ddr-perf: Switch to using GENMASK > drivers/perf: nxp-s32cc-ddr-perf: Use unsigned for config attributes > drivers/perf: nxp-s32cc-ddr-perf: Handle extra CP parameter > drivers/perf: nxp-s32cc-ddr-perf: Remove "axi-id" and "axi-mask" > drivers/perf: nxp-s32cc-ddr-perf: Rename "selfresh" to "self-refresh" > drivers/perf: nxp-s32cc-ddr-perf: Use sizeof(u32) instead of 4 > drivers/perf: nxp-s32cc-ddr-perf: Use wrappers for regs read/write > > Andrei Stefanescu (15): > pinctrl: s32g: add missing GPIOs > pinctrl: s32cc: update driver to match dts > pinctrl: protect `gpio_configs` list with lock > pinctrl: s32cc: protect MSCRs/IMCRs with lock > pinctrl: s32cc: make `s32_get_pin_conf` compute mask > pinctrl: s32cc: rename "pins" property > pinctrl: s32cc: split memory region for S32G SIUL21 MSCRs > gpio: siul2-s32cc: re-enable gpio support > gpio: siul2-s32cc: enable EIRQ support > gpio: siul2-s32cc: refactor SIUL2 info > gpio: siul2-s32cc: restrict lock to only protect bitmaps > gpio: siul2-s32cc: replace `regmap_siul2_accessible` with > `regmap_access_tables` > dt-bindings: gpio: s32cc: mention the use of "gpio-reserved-ranges" > dt-bindings: gpio: s32cc: remove unused property > gpio: siul2-s32cc: don't add names for reserved GPIOs > > Bogdan Folea (87): > hse: basic platform driver init > hse: Messaging Unit interface > hse: Add hash srv desc and common types definition > hse: Register sha1 and md5 tfm with crypto API > hse: Implement asynchronous hash digest > hse: Restructure common code and hash component > hse: MU streaming mode support > hse: Refactor service response handling > hse: Hash algorithms streaming mode support > hse: check global status from probe > hse: extend MU channel reservation mechanism > hse: synchronous service request support > hse: minor refactor of hash support > hse: minor refactor of key ring management > hse: hmac support and hash improvements > hse: curtail reservation of MU channels to streams > hse: enable acquisition of shared MU channels > hse: update ABI for latest HSE_H fw > hse: fix key comparison in hse_ahash_setkey > hse: simplify device tree node hierarchy > hse: move rx callbacks to kthread context > hse: ahash DMA support and various fixes > hse: fix address translation for skcipher and rng > hse: enable SHA2 support > hse: fix missing rx interrupts > hse: fix ahash to release stream from export > hse: fix cache mgmt issues in ahash component > hse: fix service request race for hwrng > hse: keep MU channel status cached internally > hse: refactor key management into driver core > hse: refactor channel management into driver core > hse: uncouple common code from MU interface > hse: fix input padding to block size for CBC > hse: enable cipher block modes CTR, ECB, CFB > hse: update driver ABI to HSE fw interface 0.8.2 > hse: partial hash and HMAC support > hse: update firmware ABI to HSE_H_S32G2XX_1.0.8.2 > hse: fix output value of IV for AES-CTR mode > hse: update firmware ABI to version 1.0.8.5 > hse: check firmware version on driver probe > hse: implement key wrapping support > hse: user-space driver support > hse: replace ifdefs with compiler-visible checks > hse: update firmware ABI to version 0.9.0 > hse: remove DDR descriptor placement limitation > hse: add config option for debug messages > hse: move reserved memory for userspace to SRAM > hse: fix channel acquisition for streaming mode > hse: update ABI to firmware v0.9.2 > hse: fix event warning and error handling > hse: hwrng backward compatibility with fw v0.9.0 > hse: refactor ahash dynamic buffer management > hse: fix streaming mode race on request rx > hse: kconfig: enable selection of algorithm types > hse: prevent subsequent requests after fatal error > hse: remove uio component from crypto driver > crypto: hse: remove uio implementation artifact > hse: implement suspend/resume callbacks > crypto: hse: fix incorrect handling of firmware state > crypto: hse: wait for firmware init on resume > crypto: hse: minor refactor and fix iomem deref > crypto: hse: update firmware interface to v1.0.0 > crypto: hse: enable ahash algorithms by default > crypto: hse: minor type fixes in core interface > crypto: hse: search for next channel in reverse > crypto: hse: print info in human-readable format > crypto: hse: fix hwrng to handle non-blocking read > crypto: hse: fix streaming context zero padding > hse: fix race condition on sync request interrupt > crypto: hse: refactor MU configuration > crypto: hse: remove firmware older than v1.0.0 support > crypto: hse: remove deprecated key wrapping support > crypto: hse: make RNG max cache size configurable > crypto: hse: remove firmware version attr workaround > crypto: hse: enable cipher block mode AES-OFB > crypto: hse: update firmware ABI to v0.21.0 > crypto: hse: alloc ahash state context in DMA-able memory > crypto: hse: fix wrong hash result after import/export > dt-bindings: crypto: hse: add dt bindings documentation > crypto: hse: remove md5 support > uio: hse: standalone user space driver support > uio: hse: move driver reserved memory to DDR > uio: hse: fix reference counter logic > uio: hse: refactor MU configuration > uio: hse: fix driver internal memory mapping > perf: port DDR perf monitor driver to S32G274A > crypto: hse: reset descriptors to zero before use > > Bogdan Hamciuc (10): > s32cc: Add config for workaround ERR050481 > dma:fsl_edma: Fix crash on resume from Suspend to RAM > s32g:linflex: Fix suspend/resume crash > rtc: s32cc: Set dummy date > rtc: s32cc: Finer-grained clock initializations > rtc: s32cc: Move clksel and dividers config in the dts > s32cc: rtc: Save time before system suspend > s32cc: pcie: Mark PCIe transactions coherent > s32cc: pcie: Force hardware coherency defaults > s32cc: pcie: Disable PCIe coherency to peripheral targets > > Bogdan Roman (5): > mmc: sdhci-esdhc-imx: s32cc: enable Command Queueing support > gpio: siul2-s32cc: update naming for s32cc gpio > dt-bindings: gpio: s32cc: update siul2 gpio device-tree binding > documentation > hse: reduce the number of AES key slots > crypto: hse: update default key group IDs and sizes > > Bogdan-Gabriel Roman (6): > pcs: s32cc-xpcs: make members used only in this file static > spi: fsl-dspi: halt the module after a new message transfer > dt-bindings: rtc: Add S32CC RTC devicetree bindings documentation > dt-bindings: watchdog: add nxp-s32cc-wdt.yaml > pcie: dma: Update PCIE_DMA_* configurations > s32cc: pcie: create separate header file for ioctl calls definitions > > Catalin Udma (6): > s32cc: add config option for emulator > dt-bindings: include/dt-bindings/misc/ add s32cc-fccu > s32cc: fccu: Add support for configurable alarms for NCF > dt-bindings: nvmem: siul2: Add documentation for S32CC SIUL2 NVMEM > driver > nvmem: siul2: simple nvmem driver exporting SoC revision for S32CC > nvmem: siul2: Create the header file for S32CC SoC revision > > Chester Lin (4): > arm64: dts: add NXP S32CC support > arm64: dts: s32cc: add serial/uart support > arm64: dts: s32cc: add VNP-EVB and VNP-RDB2 support > dt-bindings: serial: fsl-linflexuart: convert to json-schema format > > Ciprian Costea (86): > s32cc: fccu: Add STR support > s32cc: fccu: Correctly clear SWT for S32CC > nvmem: siul2: Add support for reading SIUL2_1 registers > nvmem: siul2: Add support for setting PCIe device ID based on platform > variants > s32cc: fsl-qspi: Add pinmuxing for QSPI > arm64: dts: s32cc: add S32G3-EVB/EVB3 and S32G3-RDB3 support > arm64: dts: s32cc: add S32R45-EVB support > arm64: dts: s32cc: Add S32G2/S32G3 Emulator Target > arm64: dts: s32cc: Add S32R45 Emulator Target > arm64: dts: s32cc: Add S32G2-Bluebox3 support > dts: s32cc: Add support for uSDHC > s32cc: cpu: Add cluster topology > s32cc: dts: Add RTC support > s32cc: dts: Add SCMI reset node > s32cc: dts: Add DDR GPR node entry > arm64: dts: Add SIUL2 modules for S32CC platforms > arm64: dts: Add TMU node for S32CC platforms > s32cc: dts: Add SWT module entries > s32cc: dts: Add STM module entries > arm64: dts: Add QSPI entry for S32CC platforms > arm64: dts: Add eDMA3 nodes for S32CC platforms > arm64: dts: Add PIT module entries for S32CC platforms > arm64: dts: Add MSCM entry for S32CC platforms > arm64: dts: Add CAN modules for S32CC platforms > arm64: dts: Add SPI entries for S32CC platforms > arm64: dts: Add I2C entries for S32CC platforms > arm64: dts: Add FTM-PWM0/1 nodes for S32CC platforms > arm64: dts: Add SAR-ADC0/1 entries for S32CC platforms > arm64: dts: Add HSE entry for S32CC platforms > arm64: dts: Add FCCU module for S32CC platforms > arm64: dts: Add DDR Perf monitor entry for S32CC platforms > arm64: dts: Add DDR ERR050543 entry for S32G2/S32R platforms > arm64: dts: Add SerDes0/1 entries for S32CC platforms > arm64: dts: Add PCIe0/1 entries for S32CC platforms > arm64: dts: Add GMAC entries for S32CC platforms > arm64: dts: Add PFE support for S32G platforms > arm64: dts: Add USB support for S32G platforms > arm64: dts: Add LLCE entries for S32G platforms > s32cc: tmu: doc: Add S32CC tmu driver bindings documentation > s32cc: thermal: Add STR support > s32cc: saradc: Document NXP S32CC SAR-ADC binding > s32cc: Add IIO buffer support for SAR_ADC > s32cc: saradc: Factorize adc read configuration > sar-adc: Add support for multi-channel continuous mode > dt-bindings: gpio: s32cc: Add devicetree documentation > gpio: siul2-s32cc: Remove 'gpiochip_set_chained_irqchip' call > s32cc: flexcan: Add compatible for s32cc platforms > s32cc: flexcan: Adjust data bittiming for Classic CAN and CAN FD > s32cc: doc: Document S32CC qspi support > spi-nor: doc: Add quirks used for 'MX25UW51245G' Flash Memory > spi: spi-fsl-qspi: Add support for S32CC platforms > mtd: macronix: Add support for MX25UW51245G > s32cc: spi-fsl-qspi: Add read speed logging > s32g3: qspi: Update SMPR[DLLFSMPF] setting for DTR-OPI from 4 to 3 > s32cc: spi-fsl-qspi: Add suspend & resume support > s32r45: dts: Update qspi node entries > s32g274a: ddr: Fixed read_lpddr4_mr function > ddr: err050543: Add STR support > s32cc: pcie: Probe pci host on resume path > s32g: pcie: phy: Add SRIS clock mode > s32cc: pcie: Probe PCIe host controller even with no EP plugged > s32cc: pcie: Add hot-unplug support > s32cc: pcie: Add Hot-Plug support > s32cc: pcie: Fix STR Linux crash when PCIe controller is set as Endpoint > s32cc: pcie: Do not wait for link multiple times > s32cc: pcie: Check if SerDes subsystem is present > s32cc: pcie: Defer Probe early in case Serdes driver not yet probed > s32cc: pcie: Fix STR when NVME SSD is mounted in rootfs > s32cc: pcie: Set PCI device ID according to variant bits > s32cc: dwmac: Initialize safety features > doc: s32cc: nvmem: Document new S32G2 NVMEM compatible string > s32cc: nvmem: Fix reporting of MIDR1 MINOR for S32G2 platforms > llce_can: s32g: evb: Enable 'llce_can' > s32cc: qspi: Set serial flash memory address mapping to maximum > available > s32cc: dt-bindings: Update TMU compatible strings > s32cc: scmi: Define SCMI Clocks for TMU > s32cc: thermal: Use TMU SCMI clock > s32cc: tmu: Update TMU Calibration Table for S32CC platforms > s32cc: tmu: Update 'clks' dts entry > doc: s32cc: yaml: Fix 'tmu' yaml dts example syntax > dt-bindings: Add TMU Fuse NVMEM cell offset and size > s32cc: ocotp: Add ocotp driver > doc: s32cc: ocotp: Add S32CC OCOTP driver dt-bindings documentation > s32cc: tmu: Read fuse memory pages using NVRAM > doc: bindings: tmu: Update S32CC TMU devicetree bindings > s32g3: rdb3: i2c4: Add 'INA231' current sensor support > > Ciprian Marian Costea (17): > dt-bindings: nvmem: siul2: Create include file for nvmem cells > flexcan: Add pinmuxing for FlexCan 0,1,3 for S32G-RDB > mmc: sdhci-esdhc-imx: toggle clocks on suspend if not disabled by > runtime PM > s32cc: linflex: Fix static locking context imbalance > gpio: siul2-s32cc: Fix static code issues > phy: s32cc-serdes: serdes: Correctly set phy id > s32g: s32cc-serdes: Add SRIS clock mode > phy: s32cc-serdes: Probe PCIe host controller even with no EP plugged > spi: spi-fsl-dspi: Add support for S32 platforms > dt-bindings: spi: fsl-dspi: Add S32 node to the spi devicetree > Documentation > dt-bindings: i2c: imx: add S32CC platforms compatible > i2c: imx: add support for S32CC platforms > s32g274a: ddr: Add workaround for Erratum ERR050543 > s32cc: pcie: Move PCIe DMA generic code to 'pci-dma-s32cc' > doc: Fix some yaml syntax errors > s32cc: doc: Fix multiple devicetree bindings documentation errors > doc: Fix yaml errors > > Cristian Marussi (11): > include: trace: Add new scmi_xfer_response_wait event > firmware: arm_scmi: Perform earlier cinfo lookup call in do_xfer > firmware: arm_scmi: Set polling timeout to max_rx_timeout_ms > firmware: arm_scmi: Refactor message response path > firmware: arm_scmi: Use new trace event scmi_xfer_response_wait > firmware: arm_scmi: Add configurable polling mode for transports > firmware: arm_scmi: Add sync_cmds_completed_on_ret transport flag > firmware: arm_scmi: Add support for atomic transports > firmware: arm_scmi: Make smc transport use common completions > firmware: arm_scmi: Make smc support sync_cmds_completed_on_ret > firmware: arm_scmi: Add atomic mode support to smc transport > > Dan Nica (7): > mmc: sdhci-esdhc-imx: Use MMC_CAP2_NO_WRITE_PROTECT if ESDHC_WP_NONE > mmc: sdhci-esdhc-imx: enable MMC HS modes for S32CC > mmc: sdhci-esdhc-imx: perform strobe DLL lock at 200 MHz > mmc: sdhci-esdhc-imx: Align the manual tuning procedure with the > Reference Manual > s32cc: linflexuart: Fix usage of kernel timers > s32cc: regaccess: Add debug module that allows userspace access to SoC > registers > s32cc: mmc: Fix multiple issues in 'esdhc_executing_tuning' > > Dorin Ionita (10): > s32cc: tmu: Fixed bug about Kelvin to Celsius conversion and overflow. > tmu: s32: Fixed a bug related to deconversion of 2's complement for > fuse values. > dt-bindings: clock: Added documentation for global STM time source > clocksource: stm-global: Provided support for global timestamping at > SoC level. > Added a logging driver which uses the LLCE FW to log CAN messages and > expose them to userspace. > llce: s32g2: Fixed message to userspace when deinitialising LLCE CAN > channs. > llce: s32g2: Fixed bugs about link setup and unavailable phys for LLCE > CAN. > gmac: Fixed a bug disallowing promiscuous interfaces in bridges. > gmac: s32cc: Fixed a bug related to spliting the FCS in multiple > buffers. > gmac: s32: Deactivate split header capabilities > > Etienne Carriere (1): > firmware: arm_scmi: Add optee transport > > Florin Chiculita (1): > net: phy: add AQR113c support > > Ghennadi Procopciuc (174): > s32-gen1: Enable scmi for s32-gen1 platforms > dt-bindings: nvmem: siul2: Include s32cc siul2 header > s32g: evb: pinctrl: Add pinmuxing for CAN module > pinctrl: s32g: Add USB pinmuxing > dts: s32cc: Add FTM-PWM nodes > s32r45-evb: Add pinmuxing for CAN > pinctrl: Use one driver description per instance > dt-bindings: s32g274a: Add LLCE CAN pinmuxing defines > dts: s32cc: Add pinctrl bindings definition > pinctrl: s32cc: Remove the usage of 'gpiogrp' group > pinctrl: s32cc: Place each group into a function block > pinctrl: s32cc: Decouple gpio pin from s32_pin > pinctrl: s32cc: Use pinconf generic interface for pinmuxing > pinctrl: s32cc: Use less configs for a pinctrl group > dt-bindings: pinctrl: s32cc: Remove unused headers > dt-bindings: s32r45: Add SCMI reset IDs > bindings/reset: Add S32G3 SCMI reset controller IDs > mmc: sdhci-esdhc-imx: Add clocks to suspend and resume callbacks > dt-bindings: mmc: fsl-imx-esdhc: add bindings example for S32CC > tty: serial: linflexuart: Implement polling callbacks > gpio: siul2-s32cc: Add PM callbacks > gpio: siul2-s32cc: Fix double free > gpio: siul2-s32cc: Use 16 bits input / output pads > gpio: siul2-s32cc: Disable cache on ipad regmap > gpio: siul2-s32cc: Don't clear IRQ type when masking a GPIO IRQ > gpio: siul2-s32cc: Mark EIRQ status register volatile > gpio: siul2-s32cc: Set IRQ chip name based on device name > gpio: siul2-s32cc: List pads and EIRQ controlls as registers > gpio: siul2-s32cc: Make use of devm_gpiochip_add_data > gpio: siul2-s32cc: Allow to be referenced as interrupt controller > gpio: siul2-s32cc: Correct IRQ mapping > gpio: siul2-s32cc: Share eirq regmap among siul2 instances > gpio: siul2-s32cc: Translate EIRQ number before mapping > gpio: siul2-s32cc: Use pinconf generic interface for pinmuxing > gpio: siul2-s32cc: Use devm interface to init regmaps > gpio: siul2-s32cc: Enable set config callback > gpio: siul2-s32cc: Fix the way a SIUL2 register is declared accessible > gpio: siul2-s32cc: Set value before direction > gpio: siul2-s32cc: Correct the out pad accessibility > dt-bindings: gpio: s32cc: Various fixes > dt-bindings: phy: s32cc-serdes: Document SerDes bindings > phy: s32cc-serdes: Add SerDes driver for S32CC platforms > phy: s32cc-serdes: Add PM ops for SerDes driver > clk-scmi: Initialize clk-scmi before rest of the drivers > crypto: hse: Use dev_warn instead of dev_err when firmware isn't found > crypto: hse: Avoid memory leak during hse_ahash_export > dt-bindings: i2c: imx: Update examples > i2c: imx: remove custom recovery GPIO initialization > s32cc: rtc: Implement suspend and resume callbacks > s32cc: rtc: Simplify probe callback > s32cc: rtc: Implement read_time callback > s32cc: rtc: Implement set_time callback > rtc: Add clocks to S32CC RTC driver > pwm: Enable pwm driver for S32CC platforms > pwm: fsl-ftm: Exclude from regmap all invalid registers > pwm: fsl-ftm: Enable system clock before writing registers from FTM > module > s32cc: wdt: Introduce a flag to continue timer during core standby > clocksource: timer_vf_pit: Use platform bindings > clocksource: timer_vf_pit: Implement suspend & resume callbacks > clocksource: timer_vf_pit: Replace CPU hotplug callbacks with workqueue > clocksource: timer_vf_pit: Correct IRQ affinity > clocksource: timer_vf_pit: Use strongly ordered reads and writes > clocksource: timer_vf_pit: Setup hotplug state callbacks > clocksource: stm: Implement suspend & resume callbacks > clocksource: stm: Replace CPU hotplug callbacks with workqueue > clocksource: stm: Correct IRQ affinity > clocksource: stm: Use strongly ordered reads and writes > clocksource: stm: Setup hotplug state callbacks > arm64: Workaround for Cortex-A53 erratum 1530924 > arm64: tlb: Workaround for ERR050481 on S32G2 and R45 > dt-bindings: ddr: s32cc: Add memory-region property > usb: Document device tree bindings for s32g2/s32g3 > usb: chipidea: s32g: Add usb support for s32g274a > s32g: Avoid data corruption of the unaligned packages > usb: chipidea: add controller resume support when controller is powered > off > usb: chipidea: imx: group usbmisc operations for PM > usb: chipidea: usbmisc: Reapply init settings during resume > usb: chipidea: usbmisc: s32g: Reinit during resume > usb/chipidea: s32g3: Disable workaround for ERR050474 > pcie: s32cc: Introduce "nxp,s32cc-pcie-ep" > s32cc: pci: Encapsulate device tree initialization > s32cc: pcie: Initialize PCIE PHY > doc: Add documentation for NXP LLCE Firmware Loader > doc: Add documentation for NXP LLCE Mailbox > doc: Add documentation for NXP LLCE CAN > driver: Add LLCE core driver > drivers: mailbox: Add LLCE CAN mailbox > drivers: can: Add LLCE CAN driver > driver: llce-core: Add power management operations > driver: llce-mailbox: Add power management operations > driver: llce-can: Add power management operations > can: llce: Don't report EPROBE_DEFER errors > llce-can: Use NAPI on RX > mailbox: llce: Limit the warning messages > can: llce: Propagate error conditions to the CAN stack > llce-can: Add compatibility with LLCE firmware 1.0.0 > llce-mailbox: Limit bus errors > llce-can: Add compatibility with LLCE firmware 1.0.1 CD1 > llce-can: Add compatibility with LLCE firmware 1.0.1 > llce-can: Correct warnings > can: llce: move llce can utils into a new header > mailbox: llce: Add channel for can logger > llce: logger: Use mailbox for communication with llce firmware > dt-bindings: mailbox: Document LLCE logger interrupt > dt-bindings: mailbox: Document LLCE logger channel > dt-bindings: can: add LLCE CAN logger documentation > can: llce: Add 'logging' parameter > llce-core: Add 'load_fw' parameter > llce: logger: include id and flags in dump > llce: logger: simplify the way the log is generated > llce: share status memory region between core and mailbox driver > dt-bindings: mailbox: Update LLCE memory regions > llce: logger: Add hardware interface to log > mailbox: Lazy irq request for llce channels > mailbox: llce: Add 'config_platform' parameter > llce: logger: Add PM ops > llce: Replace memory pools with mapped areas > bindings: mfd: Add shared memory to LLCE core > can: Add hardware timestamp to CAN messages > can: Move LLCE CAN and Logger drivers into a new folder > mailbox, can: Fix LLCE_RELESE_RX_INDEX typo > mailbox: llce: Use 16 channels for logger > can: llce: Move RX related functionality into a common file > can: llce: logger: Provide the logs over SocketCAN > llce-can: Add compatibility with LLCE firmware 1.0.2 V03 > net: can/llce: Correct the way the logger advertise its link state > llce: Interface update for 1.0.3 firmware > can/llce: Use short packets for Classic CAN interfaces > mailbox: llce: Use sema42 to synchronize host and firmware > mfd/llce-core: Update status regs location > mailbox: llce: Send config commands over host0 interface > mailbox: llce: Correct IRQ enablement > mailbox: llce: Interface update for 1.0.3 firmware > net: llce-can: Add support for ethtool private stats > mailbox: llce: Add channel type name when reportring an error on it > net/can: llce: Free all RX indexes before channel deinitialization > net/can: llce: Wait for the desired state after a transition request > dt-bindings: mailbox: llce: Add sema42 register region > dt-bindings: mfd: llce-core: Add LLCE logger subnodes > dt-bindings: can: llce-logger: Add RX & TX mailboxes > dt-bindings: can: llce: Remove unuevaluatedProperties > dwmac-s32cc: Redefine GMAC clocks > net: s32cc-dwmac: Add RX clock > net: s32gen1-gmac: Initialize SerDes PHY when using SGMII mode only > serial: linflex: Initialize all fields of dma_slave_config > dts: s32cc: Reorder generic timer interrupts > gpio: s32cc: Add get_direction callback > arm64/boot/dts: Add device trees for s32g2xxa-evb3 board > firmware: arm_scmi: Split channel and device initialization > firmware: arm_scmi: Add notifications to SMC transport > firmware: arm_scmi: Add a method to verify mailbox's status > firmware: arm_scmi: Avoid deadlock when called with disabled irqs > arch/arm64: Enable mmio-mux for S32CC platforms > dt-bindings/mux: s32cc: Add IDs for CAN timestamping > dts/freescale: Add nodes for SRC module found on S32CC SoCs > clocksource: stm: Replace pr_err with dev_err > clocksource: stm: Use devm interface where possible > devicetree/bindings: Document STM compatible > devicetree/bindings: stm: Add a property for clock prescaler > clocksource: stm: Add a new compatilbe for timestamping > clocksource/stm: Add support for clock prescaler > dts/freescale: s32cc: Set prescaler to max value for STM2 > dts/freescale: s32cc: Make STM7 a timestamping counter > mailbox: llce: Mark all LLCE packages as long messages > net/can: llce: Enable TX timestamping by default > arch/arm64: Enable STM driver for S32CC platforms > gpio: s32cc: Avoid signal glitch on set_direction > firmware: scmi: Add suspend and resume callbacks to SCMI protocols > arm64: dts: s32g: Add GPIO SCMI protocol to SCMI node > arm64: dts: s32cc: Add channel for SCMI notifications > bindings/gpio: Add compatible for S32CC GPIO > arm64: dts: Add S32CC compatible to GPIO nodes > firmware: arm_scmi: add initial support for gpio protocol > gpio: add support for GPIOs provided by SCMI > > Gilles Talis (1): > s32cc: swt: Add Watchdog driver for S32CC platforms > > Ionut Vicovan (37): > s32cc: Add initial PCIe support (RC/EP) > s32cc: pcie: Fix EP setup (iATU, BARs) > s32cc: pcie: Add support for receiving MSIs as EP > pcie: s32cc: Add dma support > s32cc: pcie: Fix X1 link up for PCIe0 and other fixes > s32g274abluebox3: simplify PCIe EP setup > s32cc: pcie: Fix RC enumeration > s32cc: pcie: Refactor PCIe driver code > s32cc: pcie: Enable Basic Suspend to RAM > s32g:pcie:ep: Make the driver compatible with the EP test framework > pci: misc/pci_endpoint_test: Add LX2 and S32CC targets to the list of > supported platforms. > s32g: pci: misc/pci_endpoint_test: Workaround for vendor/device not > being set properly > pci:epf/endpoint-test: Increase verbosity > s32cc: pcie: Refactor PCIe driver > s32cc: pcie: Use list to store EP instances > s32cc: pcie: dma: Refactor and reduce DMA support > s32g: pcie: dma: Add support for unrolled channel registers > s32cc: pcie: Extract user space support code to separate source files > s32g: pcie: Add userspace access support for S32G > s32cc: pcie: Use the same logging for all PCIe drivers > s32g: pcie: dma: Add start_dma callback > s32g: pcie: epf: dma: Enable epf test framework to use start_dma > callback > pci: s32g3: dma: Update EPF test RC module to support S32G3 > pcie: s32cc: dma: Fix single buffer DMA transfer > s32cc: pcie: Make the driver compatible to the shared mem test > application > pcitest.sh: Script now skips MSIs/MSIXs which are not configured > s32cc: pci: Get shared memory for pcie use from device tree > s32cc: pcie: Refactor the timeout logic for PCIe configuration > s32cc: pcie: Remove some bit/mask hardcodings > s32cc: pcie: epf: Enable MSI-X support > s32g3: pcie: Set correct PCI device ID and vendor ID > s32cc: pcie: Ensure DBI is R/W for all register writes that require this > pcie: dw: Allow several attempts to enable R/W access to R/O registers > s32cc: pcie: Add PCIe devicetree bindings documentation > s32cc: Add io bit operations similar to U-boot > s32cc: net: xpcs: Add Mode5 demo support > s32cc: Add aliases for ethernet nodes > > Jan Petrous (19): > s32g274a: refactor ethernet pins and clocks > dt-bindings: s32cc-dwmac: second instance > s32g274a: pins: PFE EMAC_2 RGMII pins definition > s32g274a: pins: PFE EMAC_2 RGMII pins > net: ethernet: stmmac: add dwmac-s32cc driver for NXP S32CC > net: driver: stmmac: extend CSR calc support > net: driver: stmmac: dwmac-s32cc: add phy interface mode > net: driver: stmmac: dwmac-s32cc: add RGMII speed autodetection > net: driver: stmmac: dwmac-s32cc: use GMAC_0_CTRL_STS addr from DT > net:stmmac:dwmac-s32cc: make tx clock optional > s32r45x-evb: add disabled GMAC1 using SGMII > drivers: ethernet: dwmac-s32cc: support rgmii-id modes > net: phy: Add support for AQR113 PHY > dt-bindings: net: pfe: add dt bindings documentation > doc: s32cc: yaml: Add 'snps,ext_sys_time' for setting external systime > net:stmmac: Add optional setting of external systime > net: stmmac: Don't allow systime modifications for external systime > arm64: dts: s32g-pfe: remove unused global property > nxp,pfeng-hif-channels > arm64: dts: s32g-pfe: introduce nxp,pfeng-linked-phyif ethernet property > > Jeronym Juran (3): > net: ethernet: stmmac: Implement errata e50082 - watchdog > net: driver: stmmac: Implement MTL ECC error workaround > net: driver: stmmac: Implement s32g274a MTL ECC error workaround > > Jiri Slaby (2): > serial: fsl_linflexuart: deduplicate character sending > serial: fsl_linflexuart: don't call uart_write_wakeup() twice > > Julia Cartwright (2): > mailbox: llce: use spin_lock for llce mailbox txack locking > mailbox: llce: discontinue use of DO_ONCE > > Larisa Grigore (55): > arm64: Kconfig: Add s32cc target > s32cc: Add STM SYSTIMER config option > s32cc: Add PIT SYSTIMER config option > s32g274ardb: Enable i2c0 pinmuxing > include: s32g274a: Add SPI1 slave pad control > s32cc: pinmuxing: Implement suspend and resume > include:s32cc: Refactor GPIO pad description > s32cc: pinctrl: Remove PUE/PUS from GPIO configuration > include: s32cc: Add recovery pinmuxing for i2c > s32cc: doc: Add devicetree bindings documentation for eDMA3 support > s32cc: fsl-edma: Add basic support for eDMA3 > dma:fsl-edma: Disable request only when no hw request available > tty: serial: linflexuart: UART support for FIFO with DMA > tty: serial: linflexuart: Fix fsl_linflexuart LINFBRR calculation > tty: serial: linflexuart: Fix deadlock rx with edma > tty: serial: linflexuart: Enable DMATXE only after fifo > tty: serial: linflexuart: Add support for stty cstop option > tty: serial: linflexuart: fsl_linflex: Stop dma while console write > tty: serial: linflexuart: Resume DMA transfer after polling mode > finished > tty: serial: linflexuart: Fix console freeze > tty: serial: linflexuart: Fix CONFIG_DMA_API_DEBUG reported issues > serial:linflex: Disable DMA in linflex_flush_buffer > serial:linflex: Update RXEN/TXEN outside INITM > serial:linflex: Correct startup locking > serial:linflex: Make sure fifo is empty when entering INIT > serial:linflex: Revert earlycon workaround > serial:linflex: Check FIFO full before writing > serial:linflex: Fix kgdb > serial: linflex: Add write_atomic callback > serial: linflex: Guard all clock usages for emulator > serial: linflex: Clean SLEEP bit in LINCR1 after suspend > serial: linflex: LINCR1_BF bit is not used so remove it > dt-bindings: gpio: s32cc: Correct compatible usage > dt-bindings: gpio: s32cc: Replace s32g274 occurrence with s32g > gpio: siul2-s32cc: Same eirq exported by both SIULs > gpio: siul2-s32cc: Handle not implemented EIRQs > gpio: siul2-s32cc: Mark invalid EIRQ ranges > gpio: siul2-s32cc: Use irqchip template > gpio: siul2-s32cc: Replace s32g274 occurrence with s32g > dt-binding: pcf85063: Add new compatible for PCA85073A > rtc: pcf85063: Add new compatible for PCA85073A > dt-binding: pcf85063: Add nxp,no-battery property > rtc: pcf85063: Handle stopped oscillator at startup > spi: spi-fsl-dspi: Choose pinctrl base on pinctrl-names > spi: spi-fsl-dspi: Use DMA for s32 controller in slave mode > spi: spi-fsl-dspi: restrict register range for regmap access > spi-fsl-dspi: Reinitialize DSPI regs after resume for s32gen1 > spi: fsl-dspi: Restore slave pinmuxing after suspend > spi: fsl-dspi: Fix pinctrl slave setup > clocksource: timer_vf_pit: Fix imx6_vf610 build > clocksource: timer_vf_pit: Add "nxp,s32cc-pit" compatible > can: flexcan: Enable clocks on resume path > dt-bindings: clock: Added documentation for STM > clocksource: fsl_stm: Add STM driver support > dwc: pci-s32cc: Use more than one MSI > > Marius Trifu (1): > spi: spi-fsl-dspi: Use spi_alloc_slave for slave > > Martin Hrdlicka (7): > net: phy: Add support for TJA1101B PHY > pinctrl: s32g: Add S32G_IMCR_PFE_EMAC_0_ pinctrls > dts: s32g: pfe: Add TJA1101B RMII phy support on s32g3xxa-evb3 > arm64: dts: s32g-pfe: extend enum for nxp,pfeng-linked-phyif property > arm64: dts: s32g-pfe: add remote HIF netdevs > arm64: dts: s32g: Fix S32GRV-VNP-PLAT board name > dt-bindings: net: pfe: update dt bindings documentation > > Matthew Nunez (1): > pinctrl: Add driver and header files for s32cc pinmuxing > > Mihaela Martinas (1): > s32cc: pinctrl: Add pinctrl device-tree bindings documentation > > Nica Dan (1): > s32cc: tmu: Implement support for TMU > > Ondrej Spacek (6): > phy: s32cc-serdes: Add better support for Ethernet in SerDes driver. > pcs: s32cc-xpcs: Fix SGMII AN enable bit being incorrect after resume. > doc: Add device tree bindings documentation for S32CC GMAC > ethernet: gmac: Allow gmac use the s32g platform serdes driver. > ethernet: gmac: Remove clk_set_rate calls for rx clocks > ethernet: gmac: Fix missing coherency for gmac on s32 platform. > > Phu Luu An (5): > s32cc: fccu: Add driver for FCCU module > fccu: bindings: Add documentation for S32CC FCCU module > tty: serial: linflexuart: Fix bug memory leak > gpio: siul2-s32cc: Add GPIO driver to S32CC > s32cc: swt: Add support for multi watchdog > > Radu Pirea (37): > pinctrl: s32g274a: add pinmuxing for bluebox3 > dt-bindings: pinctrl: s32cc: add slew rate bindings > pinctrl: s32cc: clean up previous pin configuration > dt-bindings: clock: s32r45-scmi: add LAX clock id > dt-bindings: clock: s32r45-scmi: add SPT clock ids > dt-bindings: mmc: fsl-imx-esdhc: add compatible for S32CC > mmc: sdhci-esdhc-imx: Add S32CC support > dt-bindings: serial: fsl-linflexuart: add compatible for S32CC > dt-bindings: serial: fsl-linflexuart: add clock properties > dt-bindings: serial: fsl-linflexuart: add dma properties > dt-bindings: serial: fsl-linflexuart: add rs485 properties > tty: serial: linflexuart: add S32CC compatible string > tty: serial: linflexuart: improve locking in set_termios > serial: fsl_linflexuart: add support to change baudrate > tty: serial: linflexuart: add verify_port callback > gpio: siul2-s32cc: add gpio pin names > arm64: dts: s32cc: rename fsl,sys-mode to nxp,sys-mode > dt-bindings: rtc: add S32CC rtc bindings > dts: s32cc: update RTC bindings > dt-bindings: pwm: fsl-ftm: add compatible for S32CC > pwm: fsl-ftm: fix number of pwm channes > mailbox: llce: fix frame id > mailbox: llce: fix short mb index > net: can: llce can: fix switching beteween CAN and CAN FD > net: can: llce can: do not print errors if logging is not supported > net: can: llce can: restrict logging enablement > net: can: llce: fix return on stack data > arm64: dts: s32cc: gmac: Define rx/tx queues to use > arm64: dts: s32gxxxa-evb: add pinctrl for usdhc > arm64: dts: s32gxxxa-rdb: add pinctrl for usdhc > arm64: dts: s32gxxxa-evb: add pinctrl for usdhc > arm64: dts: s32g399a-rdb3: remove no-1-8-v property from usdhc > arm64: dts: s32r45-evb: remove cd-gpios from usdhc > arm64: dts: s32g-pfe: remove unused fsl,* properties > net: can: llce: update interface to fw version 1.0.5 > gpio: s32cc: changed gpio data type from int to irq_hw_number_t > serial: linflex: do not stop DMA while reading received > > Radu Pirea (NXP OSS) (10): > phy: nxp-c45-tja11xx: add extts and perout support > net: phy: tja11xx: do not touch dev->parent for tja1102_p1 > phy: nxp-c45-tja11xx: check for FUSA_PASS irq > dt-bindings: llce-mailbox: add aux channel > drivers: mailbox: llce: add logger config channel > dt-bindings: can: llce-logger: add config channel > drivers: net: can: llce logger: check logging feature > net: can: llce_logger: request the RX channel by name > net: can: llce_can: add netdev notifier > mailbox: llce: upgrade to LLCE 1.0.4 > > Stefan-Gabriel Mirea (10): > dt-bindings: pinctrl: Add DSPI5 pin macros > fsl-edma: Initialize all channels > IIO ADC: Add basic S32CC SAR-ADC driver > s32cc: saradc: Implement single output reading > s32cc: saradc: Add file for scale retrieval > s32cc: saradc: Add frequency getter and setter > s32cc: saradc: Implement suspend and resume callbacks > doc: flexcan: Add S32CC Flexcan devicetree bindings documentation > s32cc: can: flexcan: Handle separate interrupt lines > can: flexcan: Update stats when skb allocation fails > > Stoica Cosmin-Stefan (3): > mmc: sdhci-esdhc-imx: disable erratum ERR004536 fix for S32CC > dt-bindings: clock: Added documentation for PIT > clocksource: timer_vf_pit: PIT driver improvements > > Teodor Marina (3): > rtc: Add driver for S32CC > rtc: s32cc: Use rtc_class_ops structure instead of standard sysfs > implementation > s32cc: rtc: Read the frequencies dynamically > > Valentin Ciocoi Radulescu (6): > hse: crypto driver skeleton > hse: AES-CBC skcipher register > hse: fix hse module insert crash > hse: add support for AES-GCM AEAD > hse: fix offsetted dma addresses > hse: add rst documentation > > Vicovan Ionut-Valentin-VCVV001 (1): > i2c: imx: improve i2c clock config precision > > Vijaya Krishna Nivarthi (1): > serial: core: Do stop_rx in suspend path for console if console_suspend > is disabled > > Vlad Pelin (7): > hse: add skcipher and key mgmt service descriptors > hse: symmetric key cipher support > hse: minor skcipher refactoring > hse: fix skcipher last output block in iv > hse: Add hwrng support > dt-bindings: uio: add s32cc-hse-rmem info > secboot: add secboot support to userspace > > Yibo Liu (2): > drivers: net: can: llce_can: support eid frame > drivers: net: can: llce_can: config llcecan no FD > > Documentation/arm64/silicon-errata.rst | 2 + > Documentation/crypto/index.rst | 1 + > Documentation/crypto/nxp/hse.rst | 93 + > .../devicetree/bindings/clock/nxp-pit.yaml | 57 + > .../bindings/clock/nxp-s32cc-stm-global.yaml | 63 + > .../devicetree/bindings/clock/nxp-s32cc-stm.yaml | 56 + > .../devicetree/bindings/crypto/nxp-hse.yaml | 66 + > .../devicetree/bindings/ddr/nxp,s32cc-ddr.yaml | 41 + > Documentation/devicetree/bindings/dma/fsl-edma.txt | 20 + > .../devicetree/bindings/gpio/gpio-s32cc.yaml | 124 ++ > Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 5 + > .../devicetree/bindings/iio/adc/s32cc-adc.yaml | 60 + > .../bindings/mailbox/nxp,s32g-llce-mailbox.yaml | 150 ++ > .../devicetree/bindings/mfd/nxp,s32cc-ddr-gpr.yaml | 37 + > .../bindings/mfd/nxp,s32g-llce-core.yaml | 144 ++ > .../devicetree/bindings/misc/nxp-s32cc-fccu.yaml | 93 + > .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 18 + > .../devicetree/bindings/mtd/jedec,spi-nor.yaml | 20 + > .../devicetree/bindings/net/can/fsl,flexcan.yaml | 76 +- > .../bindings/net/can/nxp,s32g-llce-can-logger.yaml | 55 + > .../bindings/net/can/nxp,s32g-llce-can.yaml | 90 + > .../devicetree/bindings/net/nxp,s32cc-dwmac.yaml | 219 ++ > .../devicetree/bindings/net/nxp,s32g-pfe.yaml | 267 +++ > .../devicetree/bindings/net/snps,dwmac.yaml | 6 + > .../bindings/nvmem/nxp,s32cc-ocotp-nvmem.yaml | 59 + > .../bindings/nvmem/nxp,s32cc-siul2-nvmem.yaml | 63 + > .../devicetree/bindings/pci/nxp,s32-pcie.yaml | 167 ++ > .../devicetree/bindings/phy/nxp,s32cc-serdes.yaml | 142 ++ > .../bindings/pinctrl/nxp,s32cc-siul2.yaml | 94 + > .../devicetree/bindings/pwm/pwm-fsl-ftm.txt | 1 + > .../reserved-memory/nxp,s32cc-hse-rmem.yaml | 48 + > .../devicetree/bindings/rtc/nxp,pcf85063.txt | 3 + > .../devicetree/bindings/rtc/nxp,s32cc-rtc.yaml | 81 + > .../bindings/serial/fsl,s32-linflexuart.txt | 22 - > .../bindings/serial/fsl,s32-linflexuart.yaml | 96 + > .../devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml | 28 + > .../devicetree/bindings/spi/spi-fsl-dspi.txt | 9 +- > .../devicetree/bindings/thermal/s32cc-thermal.yaml | 70 + > .../devicetree/bindings/usb/ci-hdrc-usb2.txt | 1 + > .../devicetree/bindings/usb/usbmisc-imx.txt | 2 + > .../bindings/watchdog/nxp-s32cc-wdt.yaml | 55 + > arch/arm64/Kconfig | 13 + > arch/arm64/Kconfig.platforms | 63 + > arch/arm64/boot/dts/freescale/Makefile | 18 + > .../dts/freescale/s32cc-nxp-flash-macronix.dtsi | 53 + > arch/arm64/boot/dts/freescale/s32cc.dtsi | 1173 +++++++++++ > .../dts/freescale/s32g-nxp-flash-macronix.dtsi | 15 + > arch/arm64/boot/dts/freescale/s32g-pfe-slave.dtsi | 95 + > arch/arm64/boot/dts/freescale/s32g-pfe.dtsi | 178 ++ > arch/arm64/boot/dts/freescale/s32g.dtsi | 1019 ++++++++++ > arch/arm64/boot/dts/freescale/s32g2.dtsi | 33 + > .../arm64/boot/dts/freescale/s32g274a-bluebox3.dts | 519 +++++ > arch/arm64/boot/dts/freescale/s32g274a-emu.dts | 164 ++ > .../boot/dts/freescale/s32g274a-rdb2-pfems.dts | 19 + > arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 10 + > arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtsi | 45 + > .../boot/dts/freescale/s32g2xxa-evb-pfems.dts | 18 + > arch/arm64/boot/dts/freescale/s32g2xxa-evb.dts | 8 + > arch/arm64/boot/dts/freescale/s32g2xxa-evb.dtsi | 32 + > .../boot/dts/freescale/s32g2xxa-evb3-pfems.dts | 15 + > arch/arm64/boot/dts/freescale/s32g2xxa-evb3.dts | 6 + > arch/arm64/boot/dts/freescale/s32g2xxa-evb3.dtsi | 25 + > arch/arm64/boot/dts/freescale/s32g3.dtsi | 194 ++ > arch/arm64/boot/dts/freescale/s32g399a-emu.dts | 69 + > .../boot/dts/freescale/s32g399a-rdb3-pfems.dts | 19 + > arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts | 8 + > arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtsi | 53 + > .../boot/dts/freescale/s32g3xxa-evb-pfems.dts | 18 + > arch/arm64/boot/dts/freescale/s32g3xxa-evb.dts | 6 + > arch/arm64/boot/dts/freescale/s32g3xxa-evb.dtsi | 41 + > .../boot/dts/freescale/s32g3xxa-evb3-pfems.dts | 18 + > .../boot/dts/freescale/s32g3xxa-evb3-rmii.dts | 103 + > arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dts | 6 + > arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dtsi | 41 + > arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi | 1142 +++++++++++ > arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi | 1009 ++++++++++ > arch/arm64/boot/dts/freescale/s32r45-emu.dts | 138 ++ > arch/arm64/boot/dts/freescale/s32r45-evb.dts | 826 ++++++++ > arch/arm64/boot/dts/freescale/s32r45.dtsi | 306 +++ > arch/arm64/include/asm/cpufeature.h | 15 + > arch/arm64/include/asm/kvm_mmu.h | 6 +- > arch/arm64/include/asm/sysreg.h | 1 + > arch/arm64/include/asm/tlbflush.h | 31 + > arch/arm64/kernel/cpu_errata.c | 37 +- > arch/arm64/kvm/hyp/vhe/switch.c | 6 +- > arch/arm64/kvm/hyp/vhe/tlb.c | 6 +- > arch/arm64/tools/cpucaps | 1 + > drivers/Kconfig | 4 + > drivers/Makefile | 1 + > drivers/clk/clk-scmi.c | 13 +- > drivers/clocksource/Kconfig | 14 + > drivers/clocksource/Makefile | 2 + > drivers/clocksource/nxp_global_time.c | 233 +++ > drivers/clocksource/timer-nxp-stm.c | 454 +++++ > drivers/clocksource/timer-vf-pit.c | 425 +++- > drivers/crypto/Kconfig | 2 + > drivers/crypto/Makefile | 1 + > drivers/crypto/hse/Kconfig | 131 ++ > drivers/crypto/hse/Makefile | 12 + > drivers/crypto/hse/hse-abi.h | 635 ++++++ > drivers/crypto/hse/hse-aead.c | 521 +++++ > drivers/crypto/hse/hse-ahash.c | 1192 +++++++++++ > drivers/crypto/hse/hse-core.c | 1021 ++++++++++ > drivers/crypto/hse/hse-core.h | 66 + > drivers/crypto/hse/hse-mu.c | 439 ++++ > drivers/crypto/hse/hse-mu.h | 60 + > drivers/crypto/hse/hse-rng.c | 225 +++ > drivers/crypto/hse/hse-skcipher.c | 543 +++++ > drivers/ddr/s32cc/Kconfig | 12 + > drivers/ddr/s32cc/Makefile | 3 + > drivers/ddr/s32cc/ddr.c | 296 +++ > drivers/ddr/s32cc/ddr.h | 96 + > drivers/ddr/s32cc/ddr_poll.c | 67 + > drivers/dma/fsl-edma-common.c | 87 +- > drivers/dma/fsl-edma-common.h | 73 +- > drivers/dma/fsl-edma.c | 269 ++- > drivers/firmware/arm_scmi/Kconfig | 26 + > drivers/firmware/arm_scmi/Makefile | 2 + > drivers/firmware/arm_scmi/bus.c | 24 + > drivers/firmware/arm_scmi/common.h | 24 + > drivers/firmware/arm_scmi/driver.c | 207 +- > drivers/firmware/arm_scmi/gpio.c | 597 ++++++ > drivers/firmware/arm_scmi/optee.c | 581 ++++++ > drivers/firmware/arm_scmi/shmem.c | 9 +- > drivers/firmware/arm_scmi/smc.c | 258 ++- > drivers/gpio/Kconfig | 19 + > drivers/gpio/Makefile | 2 + > drivers/gpio/gpio-scmi.c | 868 ++++++++ > drivers/gpio/gpio-siul2-s32cc.c | 1309 ++++++++++++ > drivers/i2c/busses/Kconfig | 7 +- > drivers/i2c/busses/i2c-imx.c | 76 +- > drivers/iio/adc/Kconfig | 13 + > drivers/iio/adc/Makefile | 1 + > drivers/iio/adc/s32cc_adc.c | 824 ++++++++ > drivers/mailbox/Kconfig | 9 + > drivers/mailbox/Makefile | 2 + > drivers/mailbox/llce-mailbox.c | 2095 > ++++++++++++++++++++ > drivers/mfd/Kconfig | 10 + > drivers/mfd/Makefile | 1 + > drivers/mfd/llce-core.c | 470 +++++ > drivers/misc/Makefile | 1 + > drivers/misc/fccu/Kconfig | 11 + > drivers/misc/fccu/Makefile | 6 + > drivers/misc/fccu/s32cc_fccu.c | 692 +++++++ > drivers/misc/pci_endpoint_test.c | 46 +- > drivers/mmc/host/Kconfig | 4 +- > drivers/mmc/host/sdhci-esdhc-imx.c | 197 +- > drivers/mtd/spi-nor/core.c | 40 +- > drivers/mtd/spi-nor/macronix.c | 104 + > drivers/net/can/Kconfig | 1 + > drivers/net/can/Makefile | 1 + > drivers/net/can/flexcan.c | 529 +++-- > drivers/net/can/llce/Kconfig | 37 + > drivers/net/can/llce/Makefile | 8 + > drivers/net/can/llce/llce_can.c | 1031 ++++++++++ > drivers/net/can/llce/llce_can_common.c | 609 ++++++ > drivers/net/can/llce/llce_logger.c | 249 +++ > drivers/net/ethernet/stmicro/stmmac/Kconfig | 22 + > drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + > drivers/net/ethernet/stmicro/stmmac/common.h | 3 +- > drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c | 527 +++++ > drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 57 - > drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 106 +- > drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h | 36 + > drivers/net/ethernet/stmicro/stmmac/hwif.c | 15 +- > drivers/net/ethernet/stmicro/stmmac/hwif.h | 1 + > drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 47 +- > .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 + > drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | 12 + > drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h | 2 + > drivers/net/pcs/Makefile | 1 + > drivers/net/pcs/nxp-s32cc-xpcs.c | 1144 +++++++++++ > drivers/net/pcs/pcs-xpcs.c | 23 - > drivers/net/phy/aquantia_main.c | 39 + > drivers/net/phy/nxp-c45-tja11xx.c | 245 ++- > drivers/net/phy/nxp-tja11xx.c | 26 +- > drivers/nvmem/Kconfig | 18 + > drivers/nvmem/Makefile | 4 + > drivers/nvmem/s32cc-ocotp-nvmem.c | 209 ++ > drivers/nvmem/s32cc_siul2_nvmem.c | 242 +++ > drivers/pci/controller/Kconfig | 54 + > drivers/pci/controller/dwc/Makefile | 2 + > drivers/pci/controller/dwc/pci-dma-s32cc.c | 542 +++++ > drivers/pci/controller/dwc/pci-dma-s32cc.h | 213 ++ > drivers/pci/controller/dwc/pci-ioctl-s32cc.c | 218 ++ > drivers/pci/controller/dwc/pci-ioctl-s32cc.h | 88 + > drivers/pci/controller/dwc/pci-s32cc-regs.h | 538 +++++ > drivers/pci/controller/dwc/pci-s32cc.c | 2039 +++++++++++++++++++ > drivers/pci/controller/dwc/pci-s32cc.h | 127 ++ > drivers/pci/controller/dwc/pcie-designware-ep.c | 26 + > drivers/pci/controller/dwc/pcie-designware-host.c | 3 +- > drivers/pci/controller/dwc/pcie-designware.h | 26 + > drivers/pci/endpoint/functions/pci-epf-test.c | 130 +- > drivers/pci/endpoint/pci-epc-core.c | 38 + > drivers/perf/Kconfig | 8 + > drivers/perf/Makefile | 1 + > drivers/perf/nxp-s32cc-ddr-perf.c | 717 +++++++ > drivers/phy/freescale/Kconfig | 8 + > drivers/phy/freescale/Makefile | 1 + > drivers/phy/freescale/phy-nxp-s32cc-serdes.c | 1162 +++++++++++ > drivers/pinctrl/freescale/Kconfig | 14 + > drivers/pinctrl/freescale/Makefile | 3 + > drivers/pinctrl/freescale/pinctrl-s32cc-core.c | 1115 +++++++++++ > drivers/pinctrl/freescale/pinctrl-s32cc.h | 93 + > drivers/pinctrl/freescale/pinctrl-s32g.c | 787 ++++++++ > drivers/pinctrl/freescale/pinctrl-s32r45.c | 606 ++++++ > drivers/pwm/pwm-fsl-ftm.c | 41 +- > drivers/rtc/Kconfig | 10 + > drivers/rtc/Makefile | 1 + > drivers/rtc/rtc-pcf85063.c | 24 + > drivers/rtc/rtc-s32cc.c | 722 +++++++ > drivers/soc/fsl/Kconfig | 9 + > drivers/soc/fsl/Makefile | 1 + > drivers/soc/fsl/s32cc_regaccess.c | 155 ++ > drivers/spi/Kconfig | 7 +- > drivers/spi/spi-fsl-dspi.c | 249 ++- > drivers/spi/spi-fsl-qspi.c | 918 +++++++-- > drivers/thermal/Kconfig | 9 + > drivers/thermal/Makefile | 1 + > drivers/thermal/s32cc_thermal.c | 613 ++++++ > drivers/thermal/s32cc_thermal.h | 109 + > drivers/tty/serial/fsl_linflexuart.c | 1137 +++++++++-- > drivers/tty/serial/serial_core.c | 11 +- > drivers/uio/Kconfig | 41 + > drivers/uio/Makefile | 1 + > drivers/uio/uio_hse.c | 668 +++++++ > drivers/usb/chipidea/ci.h | 19 + > drivers/usb/chipidea/ci_hdrc_imx.c | 55 +- > drivers/usb/chipidea/ci_hdrc_imx.h | 4 +- > drivers/usb/chipidea/core.c | 110 +- > drivers/usb/chipidea/host.c | 85 + > drivers/usb/chipidea/otg.c | 2 +- > drivers/usb/chipidea/otg.h | 1 + > drivers/usb/chipidea/udc.c | 40 + > drivers/usb/chipidea/usbmisc_imx.c | 202 +- > drivers/watchdog/Kconfig | 10 + > drivers/watchdog/Makefile | 1 + > drivers/watchdog/s32cc_wdt.c | 320 +++ > include/dt-bindings/clock/s32cc-scmi-clock.h | 88 + > include/dt-bindings/clock/s32g-scmi-clock.h | 65 + > include/dt-bindings/clock/s32r45-scmi-clock.h | 32 + > include/dt-bindings/mailbox/nxp-llce-mb.h | 18 + > include/dt-bindings/memory/s32cc-siul2.h | 25 + > include/dt-bindings/misc/s32cc-fccu.h | 14 + > include/dt-bindings/mux/nxp-s32g-can-ts.h | 15 + > include/dt-bindings/mux/nxp-s32r45-can-ts.h | 15 + > include/dt-bindings/net/s32g-pfe.h | 25 + > include/dt-bindings/nvmem/s32cc-ocotp-nvmem.h | 9 + > include/dt-bindings/nvmem/s32cc-siul2-nvmem.h | 13 + > include/dt-bindings/perf/s32cc-scmi-perf.h | 15 + > include/dt-bindings/phy/phy-s32cc-serdes.h | 14 + > include/dt-bindings/pinctrl/s32cc-pinfunc.h | 31 + > include/dt-bindings/reset/s32cc-scmi-reset.h | 33 + > include/dt-bindings/reset/s32g-scmi-reset.h | 19 + > include/dt-bindings/reset/s32g3-scmi-reset.h | 24 + > include/dt-bindings/reset/s32r45-scmi-reset.h | 19 + > include/dt-bindings/rtc/s32cc-rtc.h | 13 + > include/linux/can/dev/llce_can_common.h | 98 + > include/linux/cpuhotplug.h | 2 + > include/linux/gpio_ops_scmi_protocol.h | 43 + > include/linux/gpio_scmi_protocol.h | 55 + > include/linux/mailbox/nxp-llce/llce_can.h | 1398 +++++++++++++ > include/linux/mailbox/nxp-llce/llce_fw_interface.h | 530 +++++ > include/linux/mailbox/nxp-llce/llce_fw_version.h | 20 + > .../linux/mailbox/nxp-llce/llce_interface_config.h | 138 ++ > .../linux/mailbox/nxp-llce/llce_interface_fifo.h | 74 + > include/linux/mailbox/nxp-llce/llce_mailbox.h | 87 + > include/linux/mailbox/nxp-llce/llce_sema42.h | 119 ++ > include/linux/mtd/spi-nor.h | 7 + > include/linux/pci-epc.h | 6 + > include/linux/pcie/nxp-s32cc-pcie-phy-submode.h | 14 + > include/linux/pcs/nxp-s32cc-xpcs.h | 58 + > include/linux/pcs/pcs-xpcs.h | 25 +- > include/linux/scmi_protocol.h | 10 + > include/linux/stmmac.h | 9 +- > include/linux/usb/chipidea.h | 1 + > include/soc/fsl/nxp-s32cc-io.h | 35 + > include/soc/s32cc/fuse.h | 33 + > include/soc/s32cc/fuse_defs.h | 20 + > include/soc/s32cc/nvmem_common.h | 32 + > include/soc/s32cc/revision.h | 52 + > include/soc/s32cc/revision_defs.h | 19 + > include/trace/events/scmi.h | 28 + > include/uapi/linux/pcitest.h | 1 + > tools/pci/pcitest.c | 17 +- > tools/pci/pcitest.sh | 42 +- > 286 files changed, 47490 insertions(+), 1109 deletions(-) > create mode 100644 Documentation/crypto/nxp/hse.rst > create mode 100644 Documentation/devicetree/bindings/clock/nxp-pit.yaml > create mode 100644 > Documentation/devicetree/bindings/clock/nxp-s32cc-stm-global.yaml > create mode 100644 Documentation/devicetree/bindings/clock/nxp-s32cc-stm.yaml > create mode 100644 Documentation/devicetree/bindings/crypto/nxp-hse.yaml > create mode 100644 Documentation/devicetree/bindings/ddr/nxp,s32cc-ddr.yaml > create mode 100644 Documentation/devicetree/bindings/gpio/gpio-s32cc.yaml > create mode 100644 Documentation/devicetree/bindings/iio/adc/s32cc-adc.yaml > create mode 100644 > Documentation/devicetree/bindings/mailbox/nxp,s32g-llce-mailbox.yaml > create mode 100644 > Documentation/devicetree/bindings/mfd/nxp,s32cc-ddr-gpr.yaml > create mode 100644 > Documentation/devicetree/bindings/mfd/nxp,s32g-llce-core.yaml > create mode 100644 Documentation/devicetree/bindings/misc/nxp-s32cc-fccu.yaml > create mode 100644 > Documentation/devicetree/bindings/net/can/nxp,s32g-llce-can-logger.yaml > create mode 100644 > Documentation/devicetree/bindings/net/can/nxp,s32g-llce-can.yaml > create mode 100644 Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml > create mode 100644 Documentation/devicetree/bindings/net/nxp,s32g-pfe.yaml > create mode 100644 > Documentation/devicetree/bindings/nvmem/nxp,s32cc-ocotp-nvmem.yaml > create mode 100644 > Documentation/devicetree/bindings/nvmem/nxp,s32cc-siul2-nvmem.yaml > create mode 100644 Documentation/devicetree/bindings/pci/nxp,s32-pcie.yaml > create mode 100644 > Documentation/devicetree/bindings/phy/nxp,s32cc-serdes.yaml > create mode 100644 > Documentation/devicetree/bindings/pinctrl/nxp,s32cc-siul2.yaml > create mode 100644 > Documentation/devicetree/bindings/reserved-memory/nxp,s32cc-hse-rmem.yaml > create mode 100644 Documentation/devicetree/bindings/rtc/nxp,s32cc-rtc.yaml > delete mode 100644 > Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt > create mode 100644 > Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml > create mode 100644 > Documentation/devicetree/bindings/thermal/s32cc-thermal.yaml > create mode 100644 > Documentation/devicetree/bindings/watchdog/nxp-s32cc-wdt.yaml > create mode 100644 > arch/arm64/boot/dts/freescale/s32cc-nxp-flash-macronix.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32cc.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g-nxp-flash-macronix.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g-pfe-slave.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g-pfe.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g2.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-bluebox3.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-emu.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2-pfems.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g274a-rdb2.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb-pfems.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb3-pfems.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb3.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g2xxa-evb3.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g3.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g399a-emu.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g399a-rdb3-pfems.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g399a-rdb3.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb-pfems.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb3-pfems.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb3-rmii.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32g3xxa-evb3.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/s32r45-emu.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32r45-evb.dts > create mode 100644 arch/arm64/boot/dts/freescale/s32r45.dtsi > create mode 100644 drivers/clocksource/nxp_global_time.c > create mode 100644 drivers/clocksource/timer-nxp-stm.c > create mode 100644 drivers/crypto/hse/Kconfig > create mode 100644 drivers/crypto/hse/Makefile > create mode 100644 drivers/crypto/hse/hse-abi.h > create mode 100644 drivers/crypto/hse/hse-aead.c > create mode 100644 drivers/crypto/hse/hse-ahash.c > create mode 100644 drivers/crypto/hse/hse-core.c > create mode 100644 drivers/crypto/hse/hse-core.h > create mode 100644 drivers/crypto/hse/hse-mu.c > create mode 100644 drivers/crypto/hse/hse-mu.h > create mode 100644 drivers/crypto/hse/hse-rng.c > create mode 100644 drivers/crypto/hse/hse-skcipher.c > create mode 100644 drivers/ddr/s32cc/Kconfig > create mode 100644 drivers/ddr/s32cc/Makefile > create mode 100644 drivers/ddr/s32cc/ddr.c > create mode 100644 drivers/ddr/s32cc/ddr.h > create mode 100644 drivers/ddr/s32cc/ddr_poll.c > create mode 100644 drivers/firmware/arm_scmi/gpio.c > create mode 100644 drivers/firmware/arm_scmi/optee.c > create mode 100644 drivers/gpio/gpio-scmi.c > create mode 100644 drivers/gpio/gpio-siul2-s32cc.c > create mode 100644 drivers/iio/adc/s32cc_adc.c > create mode 100644 drivers/mailbox/llce-mailbox.c > create mode 100644 drivers/mfd/llce-core.c > create mode 100644 drivers/misc/fccu/Kconfig > create mode 100644 drivers/misc/fccu/Makefile > create mode 100644 drivers/misc/fccu/s32cc_fccu.c > create mode 100644 drivers/net/can/llce/Kconfig > create mode 100644 drivers/net/can/llce/Makefile > create mode 100644 drivers/net/can/llce/llce_can.c > create mode 100644 drivers/net/can/llce/llce_can_common.c > create mode 100644 drivers/net/can/llce/llce_logger.c > create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c > create mode 100644 drivers/net/pcs/nxp-s32cc-xpcs.c > create mode 100644 drivers/nvmem/s32cc-ocotp-nvmem.c > create mode 100644 drivers/nvmem/s32cc_siul2_nvmem.c > create mode 100644 drivers/pci/controller/dwc/pci-dma-s32cc.c > create mode 100644 drivers/pci/controller/dwc/pci-dma-s32cc.h > create mode 100644 drivers/pci/controller/dwc/pci-ioctl-s32cc.c > create mode 100644 drivers/pci/controller/dwc/pci-ioctl-s32cc.h > create mode 100644 drivers/pci/controller/dwc/pci-s32cc-regs.h > create mode 100644 drivers/pci/controller/dwc/pci-s32cc.c > create mode 100644 drivers/pci/controller/dwc/pci-s32cc.h > create mode 100644 drivers/perf/nxp-s32cc-ddr-perf.c > create mode 100644 drivers/phy/freescale/phy-nxp-s32cc-serdes.c > create mode 100644 drivers/pinctrl/freescale/pinctrl-s32cc-core.c > create mode 100644 drivers/pinctrl/freescale/pinctrl-s32cc.h > create mode 100644 drivers/pinctrl/freescale/pinctrl-s32g.c > create mode 100644 drivers/pinctrl/freescale/pinctrl-s32r45.c > create mode 100644 drivers/rtc/rtc-s32cc.c > create mode 100644 drivers/soc/fsl/s32cc_regaccess.c > create mode 100644 drivers/thermal/s32cc_thermal.c > create mode 100644 drivers/thermal/s32cc_thermal.h > create mode 100644 drivers/uio/uio_hse.c > create mode 100644 drivers/watchdog/s32cc_wdt.c > create mode 100644 include/dt-bindings/clock/s32cc-scmi-clock.h > create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h > create mode 100644 include/dt-bindings/clock/s32r45-scmi-clock.h > create mode 100644 include/dt-bindings/mailbox/nxp-llce-mb.h > create mode 100644 include/dt-bindings/memory/s32cc-siul2.h > create mode 100644 include/dt-bindings/misc/s32cc-fccu.h > create mode 100644 include/dt-bindings/mux/nxp-s32g-can-ts.h > create mode 100644 include/dt-bindings/mux/nxp-s32r45-can-ts.h > create mode 100644 include/dt-bindings/net/s32g-pfe.h > create mode 100644 include/dt-bindings/nvmem/s32cc-ocotp-nvmem.h > create mode 100644 include/dt-bindings/nvmem/s32cc-siul2-nvmem.h > create mode 100644 include/dt-bindings/perf/s32cc-scmi-perf.h > create mode 100644 include/dt-bindings/phy/phy-s32cc-serdes.h > create mode 100644 include/dt-bindings/pinctrl/s32cc-pinfunc.h > create mode 100644 include/dt-bindings/reset/s32cc-scmi-reset.h > create mode 100644 include/dt-bindings/reset/s32g-scmi-reset.h > create mode 100644 include/dt-bindings/reset/s32g3-scmi-reset.h > create mode 100644 include/dt-bindings/reset/s32r45-scmi-reset.h > create mode 100644 include/dt-bindings/rtc/s32cc-rtc.h > create mode 100644 include/linux/can/dev/llce_can_common.h > create mode 100644 include/linux/gpio_ops_scmi_protocol.h > create mode 100644 include/linux/gpio_scmi_protocol.h > create mode 100644 include/linux/mailbox/nxp-llce/llce_can.h > create mode 100644 include/linux/mailbox/nxp-llce/llce_fw_interface.h > create mode 100644 include/linux/mailbox/nxp-llce/llce_fw_version.h > create mode 100644 include/linux/mailbox/nxp-llce/llce_interface_config.h > create mode 100644 include/linux/mailbox/nxp-llce/llce_interface_fifo.h > create mode 100644 include/linux/mailbox/nxp-llce/llce_mailbox.h > create mode 100644 include/linux/mailbox/nxp-llce/llce_sema42.h > create mode 100644 include/linux/pcie/nxp-s32cc-pcie-phy-submode.h > create mode 100644 include/linux/pcs/nxp-s32cc-xpcs.h > create mode 100644 include/soc/fsl/nxp-s32cc-io.h > create mode 100644 include/soc/s32cc/fuse.h > create mode 100644 include/soc/s32cc/fuse_defs.h > create mode 100644 include/soc/s32cc/nvmem_common.h > create mode 100644 include/soc/s32cc/revision.h > create mode 100644 include/soc/s32cc/revision_defs.h
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