From: Ruiqiang Hao <ruiqiang....@windriver.com> Add marvell-cn96xx kernel config for linux v6.1. This kernel configuration is applicable to the Marvell SDK 12.
Signed-off-by: Ruiqiang Hao <ruiqiang....@windriver.com> --- .../marvell-cn96xx-preempt-rt.cfg | 14 +++++ .../marvell-cn96xx-preempt-rt.scc | 10 ++++ bsp/marvell-cn96xx/marvell-cn96xx.cfg | 51 +++++++++++++++++-- 3 files changed, 71 insertions(+), 4 deletions(-) create mode 100644 bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.cfg create mode 100644 bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.scc diff --git a/bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.cfg b/bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.cfg new file mode 100644 index 00000000..0b4edbb7 --- /dev/null +++ b/bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.cfg @@ -0,0 +1,14 @@ +.......................................................................... +. WARNING +. +. This file is a kernel configuration fragment, and not a full kernel +. configuration file. The final kernel configuration is made up of +. an assembly of processed fragments, each of which is designed to +. capture a specific part of the final configuration (e.g. platform +. configuration, feature configuration, and board specific hardware +. configuration). For more information on kernel configuration, please +. consult the product documentation. +. +.......................................................................... + +# CONFIG_TRANSPARENT_HUGEPAGE is not set diff --git a/bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.scc b/bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.scc new file mode 100644 index 00000000..ff241f20 --- /dev/null +++ b/bsp/marvell-cn96xx/marvell-cn96xx-preempt-rt.scc @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: MIT +define KMACHINE marvell-cn96xx +define KTYPE preempt-rt +define KARCH arm64 + +include ktypes/preempt-rt + +include marvell-cn96xx.scc + +kconf hardware marvell-cn96xx-preempt-rt.cfg diff --git a/bsp/marvell-cn96xx/marvell-cn96xx.cfg b/bsp/marvell-cn96xx/marvell-cn96xx.cfg index 1b1c4af3..caae1cc5 100644 --- a/bsp/marvell-cn96xx/marvell-cn96xx.cfg +++ b/bsp/marvell-cn96xx/marvell-cn96xx.cfg @@ -33,7 +33,6 @@ CONFIG_PCI_IOV=y CONFIG_PCI_HOST_GENERIC=y CONFIG_PCI_HOST_THUNDER_PEM=y -CONFIG_PCI_HOST_OCTEONTX2_PEM=y # Ethernet CONFIG_OCTEONTX2_AF=y @@ -41,6 +40,7 @@ CONFIG_OCTEONTX2_PF=y CONFIG_OCTEONTX2_VF=y CONFIG_USB_USBNET=y CONFIG_USB_NET_AX88179_178A=y +CONFIG_DCB=y # NVMe CONFIG_BLK_DEV_NVME=y @@ -97,17 +97,16 @@ CONFIG_REGULATOR_GPIO=y # VFIO CONFIG_VFIO=y CONFIG_VFIO_PCI=y -CONFIG_VFIO_NOIOMMU=y # Misc CONFIG_EEPROM_AT24=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_CAVIUM=y -CONFIG_OCTEONTX2_RM=y -CONFIG_OCTEONTX2_RM_DOM_SYSFS=y +CONFIG_MARVELL_MEMTEST=y # BPHY CONFIG_MARVELL_OTX_BPHY_CTR=y +CONFIG_OCTEONTX2_BPHY_RFOE_NETDEV=y # Mailbox CONFIG_MAILBOX=y @@ -122,3 +121,47 @@ CONFIG_COMMON_CLK_SCMI=y # CPU freq CONFIG_CPU_FREQ=y CONFIG_ARM_SCMI_CPUFREQ=y + +# GHES +CONFIG_ACPI=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_GHES=y +CONFIG_ARM_SDE_INTERFACE=y +CONFIG_EDAC_OCTEONTX=y + +# CORESIGHT +CONFIG_CORESIGHT=y +CONFIG_CORESIGHT_LINKS_AND_SINKS=y +CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y +CONFIG_CORESIGHT_CATU=y +CONFIG_CORESIGHT_SINK_TPIU=y +CONFIG_CORESIGHT_SINK_ETBV10=y +CONFIG_CORESIGHT_SOURCE_ETM4X=y +CONFIG_CORESIGHT_CPU_DEBUG=y +CONFIG_CORESIGHT_CTI=y +CONFIG_CORESIGHT_CTI_INTEGRATION_REGS=y + +# MARVELL_UB +CONFIG_MARVELL_UB=y +CONFIG_MARVELL_UB_GEN_DRIVER=y + +# AVS_RESET +CONFIG_MARVELL_AVS_RESET=y + +# SFP_INFO +CONFIG_MARVELL_SFP_INFO=y + +# FWLOG +CONFIG_MARVELL_FWLOG=y + +# PMU +CONFIG_ARM_SPE_PMU=y +CONFIG_ARM_SMMU_V3_PMU=y + +# PTP clock support +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_IDTCM=y + +# Currently this driver only work for cn106xx, but it is set to 'm' by default. +# So we have to disable it explicitly. +# CONFIG_MARVELL_CN10K_SERDES_DIAGNOSTICS is not set -- 2.35.5
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