For Atomic Mode Setting, it is safer to use raw spin lock. Mutex may cause scheduling, which avoids the following warning.
BUG: sleeping function called from invalid context at kernel/locking/mutex.c:283 in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 191, name: kworker/5:13 preempt_count: 1, expected: 0 RCU nest depth: 0, expected: 0 Preemption disabled at: <ffffffc0088b4d58>] dpu_crtc_atomic_flush+0x364/0x62c CPU: 5 PID: 191 Comm: kworker/5:13 Tainted: G WC 6.1.30-yocto-standard #1 Hardware name: Freescale i.MX8QM MEK (DT) Workqueue: events drm_mode_rmfb_work_fn Call trace: dump_backtrace.part.0+0xc8/0xd4 show_stack+0x20/0x30 dump_stack_lvl+0x6c/0x88 dump_stack+0x18/0x34 __might_resched+0x154/0x1c0 __might_sleep+0x54/0xa4 mutex_lock+0x2c/0x80 fetchunit_is_enabled+0x28/0x70 dpu_crtc_atomic_flush+0x198/0x62c drm_atomic_helper_commit_planes+0x158/0x220 drm_atomic_helper_commit_tail+0x5c/0xb0 commit_tail+0x130/0x17c drm_atomic_helper_commit+0x14c/0x180 drm_atomic_commit+0xb0/0xf0 drm_framebuffer_remove+0x468/0x4fc drm_mode_rmfb_work_fn+0x84/0xb0 process_one_work+0x1f8/0x480 worker_thread+0x238/0x450 kthread+0x108/0x114 ret_from_fork+0x10/0x20 Signed-off-by: Xiaolei Wang <[email protected]> --- drivers/gpu/imx/dpu/dpu-fetchdecode.c | 94 +++++++++++++-------------- drivers/gpu/imx/dpu/dpu-fetcheco.c | 56 ++++++++-------- drivers/gpu/imx/dpu/dpu-fetchlayer.c | 48 +++++++------- drivers/gpu/imx/dpu/dpu-fetchunit.c | 44 ++++++------- drivers/gpu/imx/dpu/dpu-fetchwarp.c | 48 +++++++------- include/video/dpu.h | 2 +- 6 files changed, 146 insertions(+), 146 deletions(-) diff --git a/drivers/gpu/imx/dpu/dpu-fetchdecode.c b/drivers/gpu/imx/dpu/dpu-fetchdecode.c index 66d5862fbfa1..cacf3124c7fe 100644 --- a/drivers/gpu/imx/dpu/dpu-fetchdecode.c +++ b/drivers/gpu/imx/dpu/dpu-fetchdecode.c @@ -79,15 +79,15 @@ int fetchdecode_pixengcfg_dynamic_src_sel(struct dpu_fetchunit *fu, { int i; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); for (i = 0; i < 4; i++) { if (fd_srcs[fu->id][i] == src) { dpu_pec_fu_write(fu, PIXENGCFG_DYNAMIC, src); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return 0; } } - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return -EINVAL; } @@ -116,21 +116,21 @@ fetchdecode_set_baseaddress(struct dpu_fetchunit *fu, unsigned int width, baddr += (dma_addr_t)(y_offset % mt_h) * stride; } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, BASEADDRESS0, baddr); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void fetchdecode_set_src_bpp(struct dpu_fetchunit *fu, int bpp) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, SOURCEBUFFERATTRIBUTES0); val &= ~0x3f0000; val |= BITSPERPIXEL(bpp); dpu_fu_write(fu, SOURCEBUFFERATTRIBUTES0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void @@ -155,12 +155,12 @@ fetchdecode_set_src_stride(struct dpu_fetchunit *fu, baddr, nonzero_mod); } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, SOURCEBUFFERATTRIBUTES0); val &= ~0xffff; val |= STRIDE(stride); dpu_fu_write(fu, SOURCEBUFFERATTRIBUTES0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void @@ -175,9 +175,9 @@ fetchdecode_set_src_buf_dimensions(struct dpu_fetchunit *fu, val = LINEWIDTH(w) | LINECOUNT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, SOURCEBUFFERDIMENSION0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void fetchdecode_set_fmt(struct dpu_fetchunit *fu, @@ -224,7 +224,7 @@ static void fetchdecode_set_fmt(struct dpu_fetchunit *fu, break; } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, CONTROL); val &= ~YUV422UPSAMPLINGMODE_MASK; val &= ~INPUTSELECT_MASK; @@ -258,7 +258,7 @@ static void fetchdecode_set_fmt(struct dpu_fetchunit *fu, val |= YUVCONVERSIONMODE(YUVCONVERSIONMODE__OFF); } dpu_fu_write(fu, LAYERPROPERTY0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); for (i = 0; i < ARRAY_SIZE(dpu_pixel_format_matrix); i++) { if (dpu_pixel_format_matrix[i].pixel_format == fmt) { @@ -270,10 +270,10 @@ static void fetchdecode_set_fmt(struct dpu_fetchunit *fu, shift &= ~(U_SHIFT_MASK | V_SHIFT_MASK); } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, COLORCOMPONENTBITS0, bits); dpu_fu_write(fu, COLORCOMPONENTSHIFT0, shift); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return; } } @@ -288,9 +288,9 @@ void fetchdecode_layeroffset(struct dpu_fetchunit *fu, unsigned int x, val = LAYERXOFFSET(x) | LAYERYOFFSET(y); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, LAYEROFFSET0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchdecode_layeroffset); @@ -301,9 +301,9 @@ void fetchdecode_clipoffset(struct dpu_fetchunit *fu, unsigned int x, val = CLIPWINDOWXOFFSET(x) | CLIPWINDOWYOFFSET(y); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CLIPWINDOWOFFSET0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchdecode_clipoffset); @@ -328,7 +328,7 @@ fetchdecode_set_pixel_blend_mode(struct dpu_fetchunit *fu, } } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY0); val &= ~(PREMULCONSTRGB | ALPHA_ENABLE_MASK | RGB_ENABLE_MASK); val |= mode; @@ -338,38 +338,38 @@ fetchdecode_set_pixel_blend_mode(struct dpu_fetchunit *fu, val &= ~CONSTANTALPHA_MASK; val |= CONSTANTALPHA(alpha >> 8); dpu_fu_write(fu, CONSTANTCOLOR0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void fetchdecode_enable_src_buf(struct dpu_fetchunit *fu) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY0); val |= SOURCEBUFFERENABLE; dpu_fu_write(fu, LAYERPROPERTY0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void fetchdecode_disable_src_buf(struct dpu_fetchunit *fu) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY0); val &= ~SOURCEBUFFERENABLE; dpu_fu_write(fu, LAYERPROPERTY0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static bool fetchdecode_is_enabled(struct dpu_fetchunit *fu) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY0); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return !!(val & SOURCEBUFFERENABLE); } @@ -381,9 +381,9 @@ void fetchdecode_clipdimensions(struct dpu_fetchunit *fu, unsigned int w, val = CLIPWINDOWWIDTH(w) | CLIPWINDOWHEIGHT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CLIPWINDOWDIMENSIONS0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchdecode_clipdimensions); @@ -399,9 +399,9 @@ fetchdecode_set_framedimensions(struct dpu_fetchunit *fu, val = FRAMEWIDTH(w) | FRAMEHEIGHT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, FRAMEDIMENSIONS, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } void fetchdecode_rgb_constantcolor(struct dpu_fetchunit *fu, @@ -411,9 +411,9 @@ void fetchdecode_rgb_constantcolor(struct dpu_fetchunit *fu, val = rgb_color(r, g, b, a); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONSTANTCOLOR0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchdecode_rgb_constantcolor); @@ -423,17 +423,17 @@ void fetchdecode_yuv_constantcolor(struct dpu_fetchunit *fu, u8 y, u8 u, u8 v) val = yuv_color(y, u, v); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONSTANTCOLOR0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchdecode_yuv_constantcolor); static void fetchdecode_set_controltrigger(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONTROLTRIGGER, SHDTOKGEN); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int fetchdecode_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) @@ -441,10 +441,10 @@ int fetchdecode_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) struct dpu_soc *dpu = fu->dpu; u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, FETCHTYPE); val &= FETCHTYPE_MASK; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); switch (val) { case FETCHTYPE__DECODE: @@ -563,16 +563,16 @@ struct dpu_fetchunit *dpu_fd_get(struct dpu_soc *dpu, int id) fu = dpu->fd_priv[i]; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); if (fu->inuse) { - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return ERR_PTR(-EBUSY); } fu->inuse = true; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return fu; } @@ -580,11 +580,11 @@ EXPORT_SYMBOL_GPL(dpu_fd_get); void dpu_fd_put(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); fu->inuse = false; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(dpu_fd_put); @@ -623,10 +623,10 @@ void _dpu_fd_init(struct dpu_soc *dpu, unsigned int id) fetchunit_baddr_autoupdate(fu, 0x0); fetchunit_shden(fu, true); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, BURSTBUFFERMANAGEMENT, SETNUMBUFFERS(16) | SETBURSTLENGTH(16)); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int dpu_fd_init(struct dpu_soc *dpu, unsigned int id, @@ -657,7 +657,7 @@ int dpu_fd_init(struct dpu_soc *dpu, unsigned int id, fu->ops = &fd_ops; fu->name = "fetchdecode"; - mutex_init(&fu->mutex); + raw_spin_lock_init(&fu->lock); ret = fetchdecode_pixengcfg_dynamic_src_sel(fu, FD_SRC_DISABLE); if (ret < 0) diff --git a/drivers/gpu/imx/dpu/dpu-fetcheco.c b/drivers/gpu/imx/dpu/dpu-fetcheco.c index d8bfb79e3ae9..f044f2b0566d 100644 --- a/drivers/gpu/imx/dpu/dpu-fetcheco.c +++ b/drivers/gpu/imx/dpu/dpu-fetcheco.c @@ -74,9 +74,9 @@ fetcheco_set_src_buf_dimensions(struct dpu_fetchunit *fu, val = LINEWIDTH(width) | LINECOUNT(height); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, SOURCEBUFFERDIMENSION0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void fetcheco_set_fmt(struct dpu_fetchunit *fu, @@ -128,7 +128,7 @@ static void fetcheco_set_fmt(struct dpu_fetchunit *fu, return; } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, FRAMERESAMPLING); val &= ~(DELTAX_MASK | DELTAY_MASK); val |= DELTAX(x) | DELTAY(y); @@ -138,7 +138,7 @@ static void fetcheco_set_fmt(struct dpu_fetchunit *fu, val &= ~RASTERMODE_MASK; val |= RASTERMODE(RASTERMODE__NORMAL); dpu_fu_write(fu, CONTROL, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); for (i = 0; i < ARRAY_SIZE(dpu_pixel_format_matrix); i++) { if (dpu_pixel_format_matrix[i].pixel_format == fmt) { @@ -148,10 +148,10 @@ static void fetcheco_set_fmt(struct dpu_fetchunit *fu, bits &= ~Y_BITS_MASK; shift &= ~Y_SHIFT_MASK; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, COLORCOMPONENTBITS0, bits); dpu_fu_write(fu, COLORCOMPONENTSHIFT0, shift); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return; } } @@ -166,9 +166,9 @@ void fetcheco_layeroffset(struct dpu_fetchunit *fu, unsigned int x, val = LAYERXOFFSET(x) | LAYERYOFFSET(y); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, LAYEROFFSET0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetcheco_layeroffset); @@ -179,9 +179,9 @@ void fetcheco_clipoffset(struct dpu_fetchunit *fu, unsigned int x, val = CLIPWINDOWXOFFSET(x) | CLIPWINDOWYOFFSET(y); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CLIPWINDOWOFFSET0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetcheco_clipoffset); @@ -192,9 +192,9 @@ void fetcheco_clipdimensions(struct dpu_fetchunit *fu, unsigned int w, val = CLIPWINDOWWIDTH(w) | CLIPWINDOWHEIGHT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CLIPWINDOWDIMENSIONS0, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetcheco_clipdimensions); @@ -210,9 +210,9 @@ fetcheco_set_framedimensions(struct dpu_fetchunit *fu, val = FRAMEWIDTH(w) | FRAMEHEIGHT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, FRAMEDIMENSIONS, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } void fetcheco_frameresampling(struct dpu_fetchunit *fu, unsigned int x, @@ -220,20 +220,20 @@ void fetcheco_frameresampling(struct dpu_fetchunit *fu, unsigned int x, { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, FRAMERESAMPLING); val &= ~(DELTAX_MASK | DELTAY_MASK); val |= DELTAX(x) | DELTAY(y); dpu_fu_write(fu, FRAMERESAMPLING, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetcheco_frameresampling); static void fetcheco_set_controltrigger(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONTROLTRIGGER, SHDTOKGEN); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int fetcheco_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) @@ -241,10 +241,10 @@ int fetcheco_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) struct dpu_soc *dpu = fu->dpu; u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, FETCHTYPE); val &= FETCHTYPE_MASK; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); switch (val) { case FETCHTYPE__DECODE: @@ -301,16 +301,16 @@ struct dpu_fetchunit *dpu_fe_get(struct dpu_soc *dpu, int id) fu = dpu->fe_priv[i]; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); if (fu->inuse) { - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return ERR_PTR(-EBUSY); } fu->inuse = true; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return fu; } @@ -318,11 +318,11 @@ EXPORT_SYMBOL_GPL(dpu_fe_get); void dpu_fe_put(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); fu->inuse = false; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(dpu_fe_put); @@ -358,10 +358,10 @@ void _dpu_fe_init(struct dpu_soc *dpu, unsigned int id) fetchunit_shden(fu, true); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, BURSTBUFFERMANAGEMENT, SETNUMBUFFERS(16) | SETBURSTLENGTH(16)); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int dpu_fe_init(struct dpu_soc *dpu, unsigned int id, @@ -399,7 +399,7 @@ int dpu_fe_init(struct dpu_soc *dpu, unsigned int id, fu->ops = &fe_ops; fu->name = "fetcheco"; - mutex_init(&fu->mutex); + raw_spin_lock_init(&fu->lock); _dpu_fe_init(dpu, id); diff --git a/drivers/gpu/imx/dpu/dpu-fetchlayer.c b/drivers/gpu/imx/dpu/dpu-fetchlayer.c index 3a72a8e65a17..527f864087af 100644 --- a/drivers/gpu/imx/dpu/dpu-fetchlayer.c +++ b/drivers/gpu/imx/dpu/dpu-fetchlayer.c @@ -58,9 +58,9 @@ fetchlayer_set_src_buf_dimensions(struct dpu_fetchunit *fu, val = LINEWIDTH(w) | LINECOUNT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, SOURCEBUFFERDIMENSION(fu->sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void fetchlayer_set_fmt(struct dpu_fetchunit *fu, @@ -72,22 +72,22 @@ static void fetchlayer_set_fmt(struct dpu_fetchunit *fu, u32 val, bits, shift; int i, sub_id = fu->sub_id; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY(sub_id)); val &= ~YUVCONVERSIONMODE_MASK; val |= YUVCONVERSIONMODE(YUVCONVERSIONMODE__OFF); dpu_fu_write(fu, LAYERPROPERTY(sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); for (i = 0; i < ARRAY_SIZE(dpu_pixel_format_matrix); i++) { if (dpu_pixel_format_matrix[i].pixel_format == fmt) { bits = dpu_pixel_format_matrix[i].bits; shift = dpu_pixel_format_matrix[i].shift; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, COLORCOMPONENTBITS(sub_id), bits); dpu_fu_write(fu, COLORCOMPONENTSHIFT(sub_id), shift); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return; } } @@ -103,9 +103,9 @@ fetchlayer_set_framedimensions(struct dpu_fetchunit *fu, unsigned int w, val = FRAMEWIDTH(w) | FRAMEHEIGHT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, FRAMEDIMENSIONS, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } void fetchlayer_rgb_constantcolor(struct dpu_fetchunit *fu, @@ -115,9 +115,9 @@ void fetchlayer_rgb_constantcolor(struct dpu_fetchunit *fu, val = rgb_color(r, g, b, a); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONSTANTCOLOR(fu->id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchlayer_rgb_constantcolor); @@ -127,17 +127,17 @@ void fetchlayer_yuv_constantcolor(struct dpu_fetchunit *fu, u8 y, u8 u, u8 v) val = yuv_color(y, u, v); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONSTANTCOLOR(fu->id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchlayer_yuv_constantcolor); static void fetchlayer_set_controltrigger(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONTROLTRIGGER, SHDTOKGEN); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int fetchlayer_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) @@ -145,10 +145,10 @@ int fetchlayer_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) struct dpu_soc *dpu = fu->dpu; u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, FETCHTYPE); val &= FETCHTYPE_MASK; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); switch (val) { case FETCHTYPE__DECODE: @@ -186,16 +186,16 @@ struct dpu_fetchunit *dpu_fl_get(struct dpu_soc *dpu, int id) fu = dpu->fl_priv[i]; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); if (fu->inuse) { - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return ERR_PTR(-EBUSY); } fu->inuse = true; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return fu; } @@ -203,11 +203,11 @@ EXPORT_SYMBOL_GPL(dpu_fl_get); void dpu_fl_put(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); fu->inuse = false; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(dpu_fl_put); @@ -247,10 +247,10 @@ void _dpu_fl_init(struct dpu_soc *dpu, unsigned int id) fetchunit_shdldreq_sticky(fu, 0xFF); fetchunit_disable_src_buf(fu); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, BURSTBUFFERMANAGEMENT, SETNUMBUFFERS(16) | SETBURSTLENGTH(16)); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int dpu_fl_init(struct dpu_soc *dpu, unsigned int id, @@ -282,7 +282,7 @@ int dpu_fl_init(struct dpu_soc *dpu, unsigned int id, fu->ops = &fl_ops; fu->name = "fetchlayer"; - mutex_init(&fu->mutex); + raw_spin_lock_init(&fu->lock); ret = fetchlayer_fetchtype(fu, &fl->fetchtype); if (ret < 0) diff --git a/drivers/gpu/imx/dpu/dpu-fetchunit.c b/drivers/gpu/imx/dpu/dpu-fetchunit.c index e6a49874ac02..8fca4b2b470d 100644 --- a/drivers/gpu/imx/dpu/dpu-fetchunit.c +++ b/drivers/gpu/imx/dpu/dpu-fetchunit.c @@ -67,14 +67,14 @@ void fetchunit_shden(struct dpu_fetchunit *fu, bool enable) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, STATICCONTROL); if (enable) val |= SHDEN; else val &= ~SHDEN; dpu_fu_write(fu, STATICCONTROL, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_shden); @@ -82,12 +82,12 @@ void fetchunit_baddr_autoupdate(struct dpu_fetchunit *fu, u8 layer_mask) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, STATICCONTROL); val &= ~BASEADDRESSAUTOUPDATE_MASK; val |= BASEADDRESSAUTOUPDATE(layer_mask); dpu_fu_write(fu, STATICCONTROL, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_baddr_autoupdate); @@ -95,12 +95,12 @@ void fetchunit_shdldreq_sticky(struct dpu_fetchunit *fu, u8 layer_mask) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, STATICCONTROL); val &= ~SHDLDREQSTICKY_MASK; val |= SHDLDREQSTICKY(layer_mask); dpu_fu_write(fu, STATICCONTROL, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_shdldreq_sticky); @@ -124,12 +124,12 @@ void fetchunit_set_burstlength(struct dpu_fetchunit *fu, burst_length = 16; } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, BURSTBUFFERMANAGEMENT); val &= ~SETBURSTLENGTH_MASK; val |= SETBURSTLENGTH(burst_length); dpu_fu_write(fu, BURSTBUFFERMANAGEMENT, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); dev_dbg(dpu->dev, "%s%d burst length is %u\n", fu->name, fu->id, burst_length); @@ -158,9 +158,9 @@ void fetchunit_set_baseaddress(struct dpu_fetchunit *fu, unsigned int width, baddr += (dma_addr_t)(y_offset % mt_h) * stride; } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, BASEADDRESS(fu->sub_id), baddr); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_set_baseaddress); @@ -168,12 +168,12 @@ void fetchunit_set_src_bpp(struct dpu_fetchunit *fu, int bpp) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, SOURCEBUFFERATTRIBUTES(fu->sub_id)); val &= ~0x3f0000; val |= BITSPERPIXEL(bpp); dpu_fu_write(fu, SOURCEBUFFERATTRIBUTES(fu->sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_set_src_bpp); @@ -204,12 +204,12 @@ void fetchunit_set_src_stride(struct dpu_fetchunit *fu, baddr, nonzero_mod); } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, SOURCEBUFFERATTRIBUTES(fu->sub_id)); val &= ~0xffff; val |= STRIDE(stride); dpu_fu_write(fu, SOURCEBUFFERATTRIBUTES(fu->sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_set_src_stride); @@ -233,7 +233,7 @@ void fetchunit_set_pixel_blend_mode(struct dpu_fetchunit *fu, } } - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY(fu->sub_id)); val &= ~(PREMULCONSTRGB | ALPHA_ENABLE_MASK | RGB_ENABLE_MASK); val |= mode; @@ -243,7 +243,7 @@ void fetchunit_set_pixel_blend_mode(struct dpu_fetchunit *fu, val &= ~CONSTANTALPHA_MASK; val |= CONSTANTALPHA(alpha >> 8); dpu_fu_write(fu, CONSTANTCOLOR(fu->sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_set_pixel_blend_mode); @@ -251,11 +251,11 @@ void fetchunit_enable_src_buf(struct dpu_fetchunit *fu) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY(fu->sub_id)); val |= SOURCEBUFFERENABLE; dpu_fu_write(fu, LAYERPROPERTY(fu->sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_enable_src_buf); @@ -263,11 +263,11 @@ void fetchunit_disable_src_buf(struct dpu_fetchunit *fu) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY(fu->sub_id)); val &= ~SOURCEBUFFERENABLE; dpu_fu_write(fu, LAYERPROPERTY(fu->sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchunit_disable_src_buf); @@ -275,9 +275,9 @@ bool fetchunit_is_enabled(struct dpu_fetchunit *fu) { u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY(fu->sub_id)); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return !!(val & SOURCEBUFFERENABLE); } diff --git a/drivers/gpu/imx/dpu/dpu-fetchwarp.c b/drivers/gpu/imx/dpu/dpu-fetchwarp.c index 953368e3fade..dfbcf8f9f65e 100644 --- a/drivers/gpu/imx/dpu/dpu-fetchwarp.c +++ b/drivers/gpu/imx/dpu/dpu-fetchwarp.c @@ -63,9 +63,9 @@ fetchwarp_set_src_buf_dimensions(struct dpu_fetchunit *fu, val = LINEWIDTH(w) | LINECOUNT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, SOURCEBUFFERDIMENSION(fu->sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } static void fetchwarp_set_fmt(struct dpu_fetchunit *fu, @@ -77,21 +77,21 @@ static void fetchwarp_set_fmt(struct dpu_fetchunit *fu, u32 val, bits, shift; int i, sub_id = fu->sub_id; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, LAYERPROPERTY(sub_id)); val &= ~YUVCONVERSIONMODE_MASK; dpu_fu_write(fu, LAYERPROPERTY(sub_id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); for (i = 0; i < ARRAY_SIZE(dpu_pixel_format_matrix); i++) { if (dpu_pixel_format_matrix[i].pixel_format == fmt) { bits = dpu_pixel_format_matrix[i].bits; shift = dpu_pixel_format_matrix[i].shift; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, COLORCOMPONENTBITS(sub_id), bits); dpu_fu_write(fu, COLORCOMPONENTSHIFT(sub_id), shift); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return; } } @@ -107,9 +107,9 @@ fetchwarp_set_framedimensions(struct dpu_fetchunit *fu, val = FRAMEWIDTH(w) | FRAMEHEIGHT(h); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, FRAMEDIMENSIONS, val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } void fetchwarp_rgb_constantcolor(struct dpu_fetchunit *fu, @@ -119,9 +119,9 @@ void fetchwarp_rgb_constantcolor(struct dpu_fetchunit *fu, val = rgb_color(r, g, b, a); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONSTANTCOLOR(fu->id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchwarp_rgb_constantcolor); @@ -131,17 +131,17 @@ void fetchwarp_yuv_constantcolor(struct dpu_fetchunit *fu, u8 y, u8 u, u8 v) val = yuv_color(y, u, v); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONSTANTCOLOR(fu->id), val); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(fetchwarp_yuv_constantcolor); static void fetchwarp_set_controltrigger(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, CONTROLTRIGGER, SHDTOKGEN); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int fetchwarp_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) @@ -149,10 +149,10 @@ int fetchwarp_fetchtype(struct dpu_fetchunit *fu, fetchtype_t *type) struct dpu_soc *dpu = fu->dpu; u32 val; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); val = dpu_fu_read(fu, FETCHTYPE); val &= FETCHTYPE_MASK; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); switch (val) { case FETCHTYPE__DECODE: @@ -190,16 +190,16 @@ struct dpu_fetchunit *dpu_fw_get(struct dpu_soc *dpu, int id) fu = dpu->fw_priv[i]; - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); if (fu->inuse) { - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return ERR_PTR(-EBUSY); } fu->inuse = true; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); return fu; } @@ -207,11 +207,11 @@ EXPORT_SYMBOL_GPL(dpu_fw_get); void dpu_fw_put(struct dpu_fetchunit *fu) { - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); fu->inuse = false; - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } EXPORT_SYMBOL_GPL(dpu_fw_put); @@ -251,10 +251,10 @@ void _dpu_fw_init(struct dpu_soc *dpu, unsigned int id) fetchunit_shdldreq_sticky(fu, 0xFF); fetchunit_disable_src_buf(fu); - mutex_lock(&fu->mutex); + raw_spin_lock(&fu->lock); dpu_fu_write(fu, BURSTBUFFERMANAGEMENT, SETNUMBUFFERS(16) | SETBURSTLENGTH(16)); - mutex_unlock(&fu->mutex); + raw_spin_unlock(&fu->lock); } int dpu_fw_init(struct dpu_soc *dpu, unsigned int id, @@ -293,7 +293,7 @@ int dpu_fw_init(struct dpu_soc *dpu, unsigned int id, fu->ops = &fw_ops; fu->name = "fetchwarp"; - mutex_init(&fu->mutex); + raw_spin_lock_init(&fu->lock); ret = fetchwarp_fetchtype(fu, &fw->fetchtype); if (ret < 0) diff --git a/include/video/dpu.h b/include/video/dpu.h index 4115da97aab8..b2fa3aa4bb89 100644 --- a/include/video/dpu.h +++ b/include/video/dpu.h @@ -388,7 +388,7 @@ struct dpu_fetchunit { void __iomem *pec_base; void __iomem *base; char *name; - struct mutex mutex; + raw_spinlock_t lock; int id; int sub_id; /* for fractional fetch units */ int type; -- 2.25.1
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