On Thu, Aug 15, 2024 at 09:58:53AM -0400, Bruce Ashfield wrote:
> On Thu, Aug 15, 2024 at 8:55 AM Kevin Hao <haoke...@gmail.com> wrote:
> >
> > The merge commit a73fbcc6d434 ("Merge branch 'v6.1/standard/base' into
> > v6.1/standard/nxp-sdk-6.1/nxp-soc") introduced a lot of unrelated changes.
> > Drop these unrelated changes. After this change, the 
> > arch/arm64/kernel/cpu_errata.c
> > is the same on both standard and rt kernel. The changes in this patch is
> > almost the same as the output of the following command:
> >   rediff <(git show a73fbcc6d4344 arch/arm64/kernel/cpu_errata.c | \
> >   sed  -e "s#^++\([^-+]\+\|$\)#-\1#" -e "s#^--\([^-+]\+\|$\)#+\1#" \
> >   -e "s#^  # #" -e "s#^[-+] # #" -e "s#^ [-+]# #" -e "s#^diff --cc#diff 
> > --git#" \
> >   -e "s#^@@@ [0-9,-]\+#@@#" -e "s#@@@#@@#")
> >
> > Signed-off-by: Kevin Hao <haoke...@gmail.com>
> > ---
> > Hi Bruce,
> >
> > Please merge this into the v6.1/standard/nxp-sdk-6.1/nxp-soc branch.
> > ---
> >  arch/arm64/kernel/cpu_errata.c | 37 +------------------------------------
> >  1 file changed, 1 insertion(+), 36 deletions(-)
> >
> > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
> > index bf45ca861dc2..74584597bfb8 100644
> > --- a/arch/arm64/kernel/cpu_errata.c
> > +++ b/arch/arm64/kernel/cpu_errata.c
> > @@ -210,29 +210,6 @@ has_neoverse_n1_erratum_1542419(const struct 
> > arm64_cpu_capabilities *entry,
> >         return is_midr_in_range(midr, &range) && has_dic;
> >  }
> >
> > -#ifdef CONFIG_NXP_S32CC_ERRATUM_ERR050481
> > -#define SYS_L2CTRL_NCORES_SHIFT        24
> > -#define SYS_L2CTRL_NCORES_MASK (0x3 << SYS_L2CTRL_NCORES_SHIFT)
> > -#define SYS_L2CTRL_2CORES      0x1
> > -
> 
> What's the actual build or runtime issue that this is causing ?

No build or runtime issue since all these codes are protected by
CONFIG_NXP_S32CC_ERRATUM_ERR050481 and CONFIG_ARM64_ERRATUM_1530924.

> 
> I'm not concerned with making this "the same" between the kernels.
> 
> Those changes arrived via my normal merging workflow, so I don't
> feel the need to manually fix them up if they aren't causing issues.

But there is no corresponding NXP_S32CC_ERRATUM_ERR050481 and 
ARM64_ERRATUM_1530924
kernel options in the v6.1/standard/nxp-sdk-6.1/nxp-soc branch. Leaving this
unnecessary code serves no purpose other than occasionally causing unnecessary
merge conflicts. I only noticed it when resolving a merge conflict caused by
this code.

Thanks,
Kevin

> 
> Bruce
> 
> > -static bool
> > -has_nxp_s32cc_erratum_err050481(const struct arm64_cpu_capabilities *entry,
> > -                                 int scope)
> > -{
> > -       u32 l2ctrl = read_sysreg_s(SYS_L2CTRL_EL1);
> > -       u32 ncores;
> > -
> > -       ncores = (l2ctrl & SYS_L2CTRL_NCORES_MASK);
> > -       ncores >>= SYS_L2CTRL_NCORES_SHIFT;
> > -
> > -       /**
> > -        * Applies to S32CC platforms with 2 cores per cluster.
> > -        * This excludes S32G3.
> > -        */
> > -       return (ncores == SYS_L2CTRL_2CORES);
> > -}
> > -#endif
> > -
> >  #ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
> >  static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
> >  #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
> > @@ -394,10 +371,6 @@ static const struct midr_range 
> > erratum_speculative_at_list[] = {
> >         MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 2, 0),
> >         /* Kryo4xx Silver (rdpe => r1p0) */
> >         MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe),
> > -#endif
> > -#ifdef CONFIG_ARM64_ERRATUM_1530924
> > -       /* Cortex-A53 r0p[01234] */
> > -       MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 4),
> >  #endif
> >         {},
> >  };
> > @@ -608,7 +581,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
> >  #endif
> >  #ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT
> >         {
> > -               .desc = "ARM errata 1165522, 1319367, 1530923, or 1530924",
> > +               .desc = "ARM errata 1165522, 1319367, or 1530923",
> >                 .capability = ARM64_WORKAROUND_SPECULATIVE_AT,
> >                 ERRATA_MIDR_RANGE_LIST(erratum_speculative_at_list),
> >         },
> > @@ -753,14 +726,6 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
> >                 .cpu_enable = cpu_clear_bf16_from_user_emulation,
> >         },
> >  #endif
> > -#ifdef CONFIG_NXP_S32CC_ERRATUM_ERR050481
> > -       {
> > -               .desc = "NXP erratum ERR050481 (TLBI handled incorrectly)",
> > -               .capability = ARM64_WORKAROUND_NXP_ERR050481,
> > -               .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
> > -               .matches = has_nxp_s32cc_erratum_err050481,
> > -       },
> > -#endif
> >  #ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
> >         {
> >                 .desc = "ARM erratum 2966298",
> >
> > ---
> > base-commit: ee06a325ce8467f89ad12a0eb86b62a4255a7ee1
> > change-id: 20240815-v6-1-nxp-e517211cbc12
> >
> > Best regards,
> > --
> > Kevin Hao <haoke...@gmail.com>
> >
> 
> 
> -- 
> - Thou shalt not follow the NULL pointer, for chaos and madness await
> thee at its end
> - "Use the force Harry" - Gandalf, Star Trek II

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