From: Kevin Hao <kexin....@windriver.com>
The merge commit c110f8602009 ("Merge branch 'v6.6/standard/base' into
v6.6/standard/preempt-rt/sdkv6.6/xlnx-soc") introduced some fabricated
changes which don't exist in the v6.6/standard/base branch. The file
arch/arm64/boot/dts/freescale/imx93.dtsi seems to be reset as the same
one in v6.6/standard/nxp-sdk-6.6/nxp-soc branch. Restore this file to
its original state by doing:
git checkout v6.6/standard/sdkv6.6/xlnx-soc
arch/arm64/boot/dts/freescale/imx93.dtsi
Signed-off-by: Kevin Hao <kexin....@windriver.com>
---
Hi Bruce,
Please merge this into the v6.6/standard/preempt-rt/sdkv6.6/xlnx-soc branch.
This is likely the same issue as the merge issues we debugged three weeks ago.
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 833 ++-----------------------------
1 file changed, 31 insertions(+), 802 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 5e8f2e2cdf7d..35155b009dd2 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -41,9 +41,6 @@ aliases {
serial5 = &lpuart6;
serial6 = &lpuart7;
serial7 = &lpuart8;
- isi0 = &isi_0;
- csi0 = &mipi_csi;
- rtc0 = &bbnsm_rtc;
};
cpus {
@@ -174,18 +171,6 @@ cm33: remoteproc-cm33 {
status = "disabled";
};
- usbphynop1: usbphynop1 {
- compatible = "usb-nop-xceiv";
- clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
- clock-names = "main_clk";
- };
-
- usbphynop2: usbphynop2 {
- compatible = "usb-nop-xceiv";
- clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
- clock-names = "main_clk";
- };
-
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -214,80 +199,6 @@ mu1: mailbox@44230000 {
status = "disabled";
};
- edma1: dma-controller@44000000{
- compatible = "fsl,imx93-edma";
- reg = <0x44000000 0x10000>,
- <0x44010000 0x10000>, <0x44020000
0x10000>,
- <0x44030000 0x10000>, <0x44040000
0x10000>,
- <0x44050000 0x10000>, <0x44060000
0x10000>,
- <0x44070000 0x10000>, <0x44080000
0x10000>,
- <0x44090000 0x10000>, <0x440a0000
0x10000>,
- <0x440b0000 0x10000>, <0x440c0000
0x10000>,
- <0x440d0000 0x10000>, <0x440e0000
0x10000>,
- <0x440f0000 0x10000>, <0x44100000
0x10000>,
- <0x44110000 0x10000>, <0x44120000
0x10000>,
- <0x44130000 0x10000>, <0x44140000
0x10000>,
- <0x44150000 0x10000>, <0x44160000
0x10000>,
- <0x44170000 0x10000>, <0x44180000
0x10000>,
- <0x44190000 0x10000>, <0x441a0000
0x10000>,
- <0x441b0000 0x10000>, <0x441c0000
0x10000>,
- <0x441d0000 0x10000>, <0x441e0000
0x10000>,
- <0x441f0000 0x10000>;
- #dma-cells = <3>;
- dma-channels = <31>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "edma1-chan0-tx",
"edma1-chan1-tx",
- "edma1-chan2-tx",
"edma1-chan3-tx",
- "edma1-chan4-tx",
"edma1-chan5-tx",
- "edma1-chan6-tx",
"edma1-chan7-tx",
- "edma1-chan8-tx",
"edma1-chan9-tx",
- "edma1-chan10-tx",
"edma1-chan11-tx",
- "edma1-chan12-tx",
"edma1-chan13-tx",
- "edma1-chan14-tx",
"edma1-chan15-tx",
- "edma1-chan16-tx",
"edma1-chan17-tx",
- "edma1-chan18-tx",
"edma1-chan19-tx",
- "edma1-chan20-tx",
"edma1-chan21-tx",
- "edma1-chan22-tx",
"edma1-chan23-tx",
- "edma1-chan24-tx",
"edma1-chan25-tx",
- "edma1-chan26-tx",
"edma1-chan27-tx",
- "edma1-chan28-tx",
"edma1-chan29-tx",
- "edma1-chan30-tx",
"edma1-err";
- clocks = <&clk IMX93_CLK_EDMA1_GATE>;
- clock-names = "edma";
- status = "okay";
- };
-
system_counter: timer@44290000 {
compatible = "nxp,sysctr-timer";
reg = <0x44290000 0x30000>;
@@ -331,19 +242,6 @@ tpm2: pwm@44320000 {
status = "disabled";
};
- i3c1: i3c-master@44330000 {
- #address-cells = <3>;
- #size-cells = <0>;
- compatible = "fsl,imx93-i3c-master",
"silvaco,i3c-master";
- reg = <0x44330000 0x10000>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_BUS_AON>,
- <&clk IMX93_CLK_I3C1_GATE>,
- <&clk IMX93_CLK_DUMMY>;
- clock-names = "pclk", "fast_clk", "slow_clk";
- status = "disabled";
- };
-
lpi2c1: i2c@44340000 {
compatible = "fsl,imx93-lpi2c",
"fsl,imx7ulp-lpi2c";
reg = <0x44340000 0x10000>;
@@ -353,8 +251,6 @@ lpi2c1: i2c@44340000 {
clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
- dmas = <&edma1 7 0 0>, <&edma1 8 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -367,8 +263,6 @@ lpi2c2: i2c@44350000 {
clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
- dmas = <&edma1 9 0 0>, <&edma1 10 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -381,8 +275,6 @@ lpspi1: spi@44360000 {
clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
- dmas = <&edma1 11 0 0>, <&edma1 12 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -395,8 +287,6 @@ lpspi2: spi@44370000 {
clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
- dmas = <&edma1 13 0 0>, <&edma1 14 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -406,8 +296,6 @@ lpuart1: serial@44380000 {
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART1_GATE>;
clock-names = "ipg";
- dmas = <&edma1 17 0 1>, <&edma1 16 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -417,8 +305,6 @@ lpuart2: serial@44390000 {
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART2_GATE>;
clock-names = "ipg";
- dmas = <&edma1 19 0 1>, <&edma1 18 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -437,19 +323,6 @@ flexcan1: can@443a0000 {
status = "disabled";
};
- sai1: sai@443b0000 {
- compatible = "fsl,imx93-sai";
- reg = <0x443b0000 0x10000>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_SAI1_IPG>, <&clk
IMX93_CLK_DUMMY>,
- <&clk IMX93_CLK_SAI1_GATE>, <&clk
IMX93_CLK_DUMMY>,
- <&clk IMX93_CLK_DUMMY>;
- clock-names = "bus", "mclk0", "mclk1", "mclk2",
"mclk3";
- dmas = <&edma1 22 0 1>, <&edma1 21 0 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
iomuxc: pinctrl@443c0000 {
compatible = "fsl,imx93-iomuxc";
reg = <0x443c0000 0x10000>;
@@ -478,9 +351,6 @@ clk: clock-controller@44450000 {
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>;
clock-names = "osc_32k", "osc_24m", "clk_ext1";
- assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>,
<&clk IMX93_CLK_A55>;
- assigned-clock-parents = <0>, <&clk
IMX93_CLK_SYS_PLL_PFD0>;
- assigned-clock-rates = <393216000>, <500000000>;
status = "okay";
};
@@ -514,7 +384,7 @@ anatop: anatop@44480000 {
};
tmu: tmu@44482000 {
- compatible ="fsl,imx93-tmu", "fsl,qoriq-tmu";
+ compatible = "fsl,qoriq-tmu";
reg = <0x44482000 0x1000>;
clocks = <&clk IMX93_CLK_TMC_GATE>;
little-endian;
@@ -532,23 +402,6 @@ tmu: tmu@44482000 {
#thermal-sensor-cells = <1>;
};
- micfil: micfil@44520000 {
- compatible = "fsl,imx93-micfil";
- reg = <0x44520000 0x10000>;
- interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_PDM_IPG>,
- <&clk IMX93_CLK_PDM_GATE>,
- <&clk IMX93_CLK_AUDIO_PLL>,
- <&clk IMX93_CLK_DUMMY>;
- clock-names = "ipg_clk", "ipg_clk_app",
- "pll8k", "clkext3";
- dmas = <&edma1 29 0 5>;
- dma-names = "rx";
- status = "disabled";
- };
adc1: adc@44530000 {
compatible = "nxp,imx93-adc";
@@ -571,148 +424,6 @@ aips2: bus@42000000 {
#size-cells = <1>;
ranges;
- edma2: dma-controller@42000000{
- compatible = "fsl,imx93-edma";
- reg = <0x42000000 0x10000>,
- <0x42010000 0x8000>, <0x42018000 0x8000>,
- <0x42020000 0x8000>, <0x42028000 0x8000>,
- <0x42030000 0x8000>, <0x42038000 0x8000>,
- <0x42040000 0x8000>, <0x42048000 0x8000>,
- <0x42050000 0x8000>, <0x42058000 0x8000>,
- <0x42060000 0x8000>, <0x42068000 0x8000>,
- <0x42070000 0x8000>, <0x42078000 0x8000>,
- <0x42080000 0x8000>, <0x42088000 0x8000>,
- <0x42090000 0x8000>, <0x42098000 0x8000>,
- <0x420a0000 0x8000>, <0x420a8000 0x8000>,
- <0x420b0000 0x8000>, <0x420b8000 0x8000>,
- <0x420c0000 0x8000>, <0x420c8000 0x8000>,
- <0x420d0000 0x8000>, <0x420d8000 0x8000>,
- <0x420e0000 0x8000>, <0x420e8000 0x8000>,
- <0x420f0000 0x8000>, <0x420f8000 0x8000>,
- <0x42100000 0x8000>, <0x42108000 0x8000>,
- <0x42110000 0x8000>, <0x42118000 0x8000>,
- <0x42120000 0x8000>, <0x42128000 0x8000>,
- <0x42130000 0x8000>, <0x42138000 0x8000>,
- <0x42140000 0x8000>, <0x42148000 0x8000>,
- <0x42150000 0x8000>, <0x42158000 0x8000>,
- <0x42160000 0x8000>, <0x42168000 0x8000>,
- <0x42170000 0x8000>, <0x42178000 0x8000>,
- <0x42180000 0x8000>, <0x42188000 0x8000>,
- <0x42190000 0x8000>, <0x42198000 0x8000>,
- <0x421a0000 0x8000>, <0x421a8000 0x8000>,
- <0x421b0000 0x8000>, <0x421b8000 0x8000>,
- <0x421c0000 0x8000>, <0x421c8000 0x8000>,
- <0x421d0000 0x8000>, <0x421d8000 0x8000>,
- <0x421e0000 0x8000>, <0x421e8000 0x8000>,
- <0x421f0000 0x8000>, <0x421f8000 0x8000>,
- <0x42200000 0x8000>, <0x42208000 0x8000>;
- #dma-cells = <3>;
- shared-interrupt;
- dma-channels = <64>;
- interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "edma2-chan0-tx",
"edma2-chan1-tx",
- "edma2-chan2-tx",
"edma2-chan3-tx",
- "edma2-chan4-tx",
"edma2-chan5-tx",
- "edma2-chan6-tx",
"edma2-chan7-tx",
- "edma2-chan8-tx",
"edma2-chan9-tx",
- "edma2-chan10-tx",
"edma2-chan11-tx",
- "edma2-chan12-tx",
"edma2-chan13-tx",
- "edma2-chan14-tx",
"edma2-chan15-tx",
- "edma2-chan16-tx",
"edma2-chan17-tx",
- "edma2-chan18-tx",
"edma2-chan19-tx",
- "edma2-chan20-tx",
"edma2-chan21-tx",
- "edma2-chan22-tx",
"edma2-chan23-tx",
- "edma2-chan24-tx",
"edma2-chan25-tx",
- "edma2-chan26-tx",
"edma2-chan27-tx",
- "edma2-chan28-tx",
"edma2-chan29-tx",
- "edma2-chan30-tx",
"edma2-chan31-tx",
- "edma2-chan32-tx",
"edma2-chan33-tx",
- "edma2-chan34-tx",
"edma2-chan35-tx",
- "edma2-chan36-tx",
"edma2-chan37-tx",
- "edma2-chan38-tx",
"edma2-chan39-tx",
- "edma2-chan40-tx",
"edma2-chan41-tx",
- "edma2-chan42-tx",
"edma2-chan43-tx",
- "edma2-chan44-tx",
"edma2-chan45-tx",
- "edma2-chan46-tx",
"edma2-chan47-tx",
- "edma2-chan48-tx",
"edma2-chan49-tx",
- "edma2-chan50-tx",
"edma2-chan51-tx",
- "edma2-chan52-tx",
"edma2-chan53-tx",
- "edma2-chan54-tx",
"edma2-chan55-tx",
- "edma2-chan56-tx",
"edma2-chan57-tx",
- "edma2-chan58-tx",
"edma2-chan59-tx",
- "edma2-chan60-tx",
"edma2-chan61-tx",
- "edma2-chan62-tx",
"edma2-chan63-tx",
- "edma2-err";
- clocks = <&clk IMX93_CLK_EDMA2_GATE>;
- clock-names = "edma";
- fsl,edma-axi;
- status = "okay";
- };
-
wakeupmix_gpr: syscon@42420000 {
compatible = "fsl,imx93-wakeupmix-syscfg",
"syscon";
reg = <0x42420000 0x1000>;
@@ -733,7 +444,6 @@ wdog3: watchdog@42490000 {
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_WDOG3_GATE>;
timeout-sec = <40>;
- fsl,ext-reset-output;
status = "disabled";
};
@@ -787,19 +497,6 @@ tpm6: pwm@42510000 {
status = "disabled";
};
- i3c2: i3c-master@42520000 {
- #address-cells = <3>;
- #size-cells = <0>;
- compatible = "fsl,imx93-i3c-master",
"silvaco,i3c-master";
- reg = <0x42520000 0x10000>;
- interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
- <&clk IMX93_CLK_I3C2_GATE>,
- <&clk IMX93_CLK_DUMMY>;
- clock-names = "pclk", "fast_clk", "slow_clk";
- status = "disabled";
- };
-
lpi2c3: i2c@42530000 {
compatible = "fsl,imx93-lpi2c",
"fsl,imx7ulp-lpi2c";
reg = <0x42530000 0x10000>;
@@ -809,8 +506,6 @@ lpi2c3: i2c@42530000 {
clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 8 0 0>, <&edma2 9 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -823,8 +518,6 @@ lpi2c4: i2c@42540000 {
clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 10 0 0>, <&edma2 11 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -837,8 +530,6 @@ lpspi3: spi@42550000 {
clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 12 0 0>, <&edma2 13 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -851,8 +542,6 @@ lpspi4: spi@42560000 {
clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 14 0 0>, <&edma2 15 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -862,8 +551,6 @@ lpuart3: serial@42570000 {
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART3_GATE>;
clock-names = "ipg";
- dmas = <&edma2 18 0 1>, <&edma2 17 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -873,8 +560,6 @@ lpuart4: serial@42580000 {
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART4_GATE>;
clock-names = "ipg";
- dmas = <&edma2 20 0 1>, <&edma2 19 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -884,8 +569,6 @@ lpuart5: serial@42590000 {
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART5_GATE>;
clock-names = "ipg";
- dmas = <&edma2 22 0 1>, <&edma2 21 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -895,8 +578,6 @@ lpuart6: serial@425a0000 {
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART6_GATE>;
clock-names = "ipg";
- dmas = <&edma2 24 0 1>, <&edma2 23 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -916,7 +597,7 @@ flexcan2: can@425b0000 {
};
flexspi1: spi@425e0000 {
- compatible = "nxp,imx93-fspi",
"nxp,imx8mm-fspi";
+ compatible = "nxp,imx8mm-fspi";
reg = <0x425e0000 0x10000>, <0x28000000
0x10000000>;
reg-names = "fspi_base", "fspi_mmap";
#address-cells = <1>;
@@ -930,62 +611,12 @@ flexspi1: spi@425e0000 {
status = "disabled";
};
- sai2: sai@42650000 {
- compatible = "fsl,imx93-sai";
- reg = <0x42650000 0x10000>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_SAI2_IPG>, <&clk
IMX93_CLK_DUMMY>,
- <&clk IMX93_CLK_SAI2_GATE>,
- <&clk IMX93_CLK_DUMMY>, <&clk
IMX93_CLK_DUMMY>;
- clock-names = "bus", "mclk0", "mclk1", "mclk2",
"mclk3";
- dmas = <&edma2 59 0 1>, <&edma2 58 0 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- sai3: sai@42660000 {
- compatible = "fsl,imx93-sai";
- reg = <0x42660000 0x10000>;
- interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_SAI3_IPG>, <&clk
IMX93_CLK_DUMMY>,
- <&clk IMX93_CLK_SAI3_GATE>,
- <&clk IMX93_CLK_DUMMY>, <&clk
IMX93_CLK_DUMMY>;
- clock-names = "bus", "mclk0", "mclk1", "mclk2",
"mclk3";
- dmas = <&edma2 61 0 1>, <&edma2 60 0 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- xcvr: xcvr@42680000 {
- compatible = "fsl,imx93-xcvr";
- reg = <0x42680000 0x800>,
- <0x42680800 0x400>,
- <0x42680c00 0x080>,
- <0x42680e00 0x080>;
- reg-names = "ram", "regs", "rxfifo",
- "txfifo";
- interrupts = /* XCVR IRQ 0 */
- <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
- /* XCVR IRQ 1 */
- <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
- <&clk IMX93_CLK_SPDIF_GATE>,
- <&clk IMX93_CLK_DUMMY>,
- <&clk IMX93_CLK_AUD_XCVR_GATE>;
- clock-names = "ipg", "phy", "spba", "pll_ipg";
- dmas = <&edma2 65 0 1>, <&edma2 66 0 0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
lpuart7: serial@42690000 {
compatible = "fsl,imx93-lpuart",
"fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
reg = <0x42690000 0x1000>;
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART7_GATE>;
clock-names = "ipg";
- dmas = <&edma2 88 0 1>, <&edma2 87 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -995,8 +626,6 @@ lpuart8: serial@426a0000 {
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART8_GATE>;
clock-names = "ipg";
- dmas = <&edma2 90 0 1>, <&edma2 89 0 0>;
- dma-names = "rx", "tx";
status = "disabled";
};
@@ -1009,8 +638,6 @@ lpi2c5: i2c@426b0000 {
clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 71 0 0>, <&edma2 72 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -1023,8 +650,6 @@ lpi2c6: i2c@426c0000 {
clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 73 0 0>, <&edma2 74 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -1037,8 +662,6 @@ lpi2c7: i2c@426d0000 {
clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 75 0 0>, <&edma2 76 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -1051,8 +674,6 @@ lpi2c8: i2c@426e0000 {
clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 77 0 0>, <&edma2 78 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -1065,8 +686,6 @@ lpspi5: spi@426f0000 {
clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 79 0 0>, <&edma2 80 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -1079,8 +698,6 @@ lpspi6: spi@42700000 {
clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 81 0 0>, <&edma2 82 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -1093,8 +710,6 @@ lpspi7: spi@42710000 {
clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 83 0 0>, <&edma2 84 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
@@ -1107,31 +722,9 @@ lpspi8: spi@42720000 {
clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
- dmas = <&edma2 85 0 0>, <&edma2 86 0 1>;
- dma-names = "tx","rx";
status = "disabled";
};
- flexio1: flexio@425c0000 {
- compatible = "nxp,imx-flexio";
- reg = <0x425c0000 0x10000>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_FLEXIO1_GATE>,
- <&clk IMX93_CLK_FLEXIO1_GATE>;
- clock-names = "per", "ipg";
- assigned-clocks = <&clk IMX93_CLK_FLEXIO1_GATE>;
- assigned-clock-parents = <&clk
IMX93_CLK_FLEXIO1>;
- assigned-clock-rates = <24000000>;
- status = "disabled";
-
- flexio_i2c: i2c-master {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible =
"nxp,imx-flexio-i2c-master";
- clock-frequency = <100000>;
- status = "disabled";
- };
- };
};
aips3: bus@42800000 {
@@ -1149,12 +742,9 @@ usdhc1: mmc@42850000 {
<&clk IMX93_CLK_WAKEUP_AXI>,
<&clk IMX93_CLK_USDHC1_GATE>;
clock-names = "ipg", "ahb", "per";
- assigned-clocks = <&clk IMX93_CLK_USDHC1>;
- assigned-clock-parents = <&clk
IMX93_CLK_SYS_PLL_PFD1>;
- assigned-clock-rates = <400000000>;
bus-width = <8>;
- fsl,tuning-start-tap = <1>;
- fsl,tuning-step= <2>;
+ fsl,tuning-start-tap = <20>;
+ fsl,tuning-step = <2>;
status = "disabled";
};
@@ -1166,12 +756,9 @@ usdhc2: mmc@42860000 {
<&clk IMX93_CLK_WAKEUP_AXI>,
<&clk IMX93_CLK_USDHC2_GATE>;
clock-names = "ipg", "ahb", "per";
- assigned-clocks = <&clk IMX93_CLK_USDHC2>;
- assigned-clock-parents = <&clk
IMX93_CLK_SYS_PLL_PFD1>;
- assigned-clock-rates = <400000000>;
bus-width = <4>;
- fsl,tuning-start-tap = <1>;
- fsl,tuning-step= <2>;
+ fsl,tuning-start-tap = <20>;
+ fsl,tuning-step = <2>;
status = "disabled";
};
@@ -1236,100 +823,19 @@ usdhc3: mmc@428b0000 {
<&clk IMX93_CLK_WAKEUP_AXI>,
<&clk IMX93_CLK_USDHC3_GATE>;
clock-names = "ipg", "ahb", "per";
- assigned-clocks = <&clk IMX93_CLK_USDHC3>;
- assigned-clock-parents = <&clk
IMX93_CLK_SYS_PLL_PFD1>;
- assigned-clock-rates = <400000000>;
bus-width = <4>;
- fsl,tuning-start-tap = <1>;
- fsl,tuning-step= <2>;
+ fsl,tuning-start-tap = <20>;
+ fsl,tuning-step = <2>;
status = "disabled";
};
-
- epxp: epxp@4ae20000 {
- compatible = "fsl,imx93-pxp-dma",
"fsl,imx8ulp-pxp-dma";
- reg = <0x4ae20000 0x10000>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_MEDIA_APB>,
- <&clk IMX93_CLK_MEDIA_AXI>;
- clock-names = "pxp_ipg", "pxp_axi";
- pxp-gpr = <&media_blk_ctrl>;
- power-domains = <&media_blk_ctrl
IMX93_MEDIABLK_PD_PXP>;
- status = "disabled";
- };
-
- cameradev: camera {
- compatible = "fsl,mxc-md", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- status = "disabled";
-
- isi_0: isi@4ae40000{
- compatible = "fsl,imx93-isi",
"fsl,imx8-isi";
- reg = <0x4ae40000 0x10000>;
- interrupts = <GIC_SPI 172
IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_ISI_GATE>,
- <&clk IMX93_CLK_MEDIA_AXI>;
- clock-names = "per", "axi";
- assigned-clocks = <&clk
IMX93_CLK_MEDIA_AXI>,
- <&clk
IMX93_CLK_MEDIA_APB>;
- assigned-clock-parents = <&clk
IMX93_CLK_SYS_PLL_PFD1>,
- <&clk
IMX93_CLK_SYS_PLL_PFD1_DIV2>;
- assigned-clock-rates = <400000000>,
<133333333>;
- interface = <2 0 2>;
- no-reset-control;
- power-domains = <&media_blk_ctrl
IMX93_MEDIABLK_PD_ISI>;
- gasket = <&media_blk_ctrl>;
- status = "disabled";
-
- cap_device {
- compatible = "imx-isi-capture";
- status = "disabled";
- };
- };
-
- mipi_csi: csi@4ae00000 {
- compatible = "fsl,dwc-mipi-csi2-host";
- reg = <0x4ae00000 0x10000>;
- interrupts = <GIC_SPI 175
IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_MIPI_CSI_GATE>,
- <&clk IMX93_CLK_CAM_PIX>,
- <&clk IMX93_CLK_MIPI_PHY_CFG>;
- clock-names = "clk_core", "clk_pixel",
"phy_cfg";
- assigned-clocks = <&clk
IMX93_CLK_CAM_PIX>,
- <&clk
IMX93_CLK_MIPI_PHY_CFG>;
- assigned-clock-parents = <&clk
IMX93_CLK_VIDEO_PLL>,
- <&clk
IMX93_CLK_24M>;
- assigned-clock-rates = <140000000>,
<24000000>;
- gasket = <&media_blk_ctrl>;
- power-domains = <&media_blk_ctrl
IMX93_MEDIABLK_PD_MIPI_CSI>;
- status = "disabled";
- };
-
- parallel_csi: pcsi@4ac10070 {
- compatible = "fsl,imx93-parallel-csi";
- reg = <0x4ac10070 0x10>;
- clocks = <&clk IMX93_CLK_MIPI_CSI_GATE>,
- <&clk IMX93_CLK_MEDIA_APB>;
- clock-names = "pixel", "ipg";
- assigned-clocks = <&clk
IMX93_CLK_CAM_PIX>;
- assigned-clock-parents = <&clk
IMX93_CLK_VIDEO_PLL>;
- assigned-clock-rates = <140000000>;
- pi_gpr = <&media_blk_ctrl>;
- power-domains = <&media_blk_ctrl
IMX93_MEDIABLK_PD_MIPI_CSI>;
- status = "disabled";
- };
- };
};
- gpio2: gpio@43810000 {
- compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
- reg = <0x43810000 0x1000>;
+ gpio2: gpio@43810080 {
+ compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
+ reg = <0x43810080 0x1000>, <0x43810040 0x40>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO2_GATE>,
@@ -1338,13 +844,12 @@ gpio2: gpio@43810000 {
gpio-ranges = <&iomuxc 0 4 30>;
};
- gpio3: gpio@43820000 {
- compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
- reg = <0x43820000 0x1000>;
+ gpio3: gpio@43820080 {
+ compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
+ reg = <0x43820080 0x1000>, <0x43820040 0x40>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO3_GATE>,
@@ -1354,13 +859,12 @@ gpio3: gpio@43820000 {
<&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
};
- gpio4: gpio@43830000 {
- compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
- reg = <0x43830000 0x1000>;
+ gpio4: gpio@43830080 {
+ compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
+ reg = <0x43830080 0x1000>, <0x43830040 0x40>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO4_GATE>,
@@ -1369,13 +873,12 @@ gpio4: gpio@43830000 {
gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
};
- gpio1: gpio@47400000 {
- compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
- reg = <0x47400000 0x1000>;
+ gpio1: gpio@47400080 {
+ compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
+ reg = <0x47400080 0x1000>, <0x47400040 0x40>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO1_GATE>,
@@ -1385,15 +888,11 @@ gpio1: gpio@47400000 {
};
ocotp: efuse@47510000 {
- compatible = "fsl,imx93-ocotp", "syscon", "simple-mfd";
+ compatible = "fsl,imx93-ocotp", "syscon";
reg = <0x47510000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
- imx93_uid: soc-uid@c0 {
- reg = <0xc0 0x10>;
- };
-
eth_mac1: mac-address@4ec {
reg = <0x4ec 0x6>;
};
@@ -1402,11 +901,6 @@ eth_mac2: mac-address@4f2 {
reg = <0x4f2 0x6>;
};
- imx93_soc: imx93-soc {
- compatible = "fsl,imx93-soc";
- nvmem-cells = <&imx93_uid>;
- nvmem-cell-names = "soc_unique_id";
- };
};
s4muap: mailbox@47520000 {
@@ -1419,8 +913,8 @@ s4muap: mailbox@47520000 {
};
media_blk_ctrl: system-controller@4ac10000 {
- compatible = "fsl,imx93-media-blk-ctrl", "syscon",
"simple-mfd";
- reg = <0x4ac10000 0x70>;
+ compatible = "fsl,imx93-media-blk-ctrl", "syscon";
+ reg = <0x4ac10000 0x10000>;
power-domains = <&mediamix>;
clocks = <&clk IMX93_CLK_MEDIA_APB>,
<&clk IMX93_CLK_MEDIA_AXI>,
@@ -1435,278 +929,13 @@ media_blk_ctrl: system-controller@4ac10000 {
clock-names = "apb", "axi", "nic", "disp", "cam",
"pxp", "lcdif", "isi", "csi", "dsi";
#power-domain-cells = <1>;
-
- dphy: dphy {
- compatible = "fsl,imx93-mipi-dphy";
- clocks = <&clk IMX93_CLK_MIPI_PHY_CFG>,
- <&clk IMX93_CLK_24M>;
- clock-names = "phy_cfg", "phy_ref";
- assigned-clocks = <&clk IMX93_CLK_MIPI_PHY_CFG>;
- assigned-clock-parents = <&clk IMX93_CLK_24M>;
- assigned-clock-rates = <24000000>;
- #phy-cells = <0>;
- power-domains = <&media_blk_ctrl
IMX93_MEDIABLK_PD_MIPI_DSI>;
- status = "disabled";
- };
-
- parallel_disp_fmt: dpi {
- compatible =
"fsl,imx93-parallel-display-format";
- power-domains = <&mediamix>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- dpi_to_lcdif: endpoint {
- remote-endpoint =
<&lcdif_to_dpi>;
- };
- };
-
- port@1 {
- reg = <1>;
- endpoint {
- };
- };
- };
- };
- };
-
- ddr: memory-controller@4e300000 {
- compatible = "nxp,imx9-memory-controller", "simple-mfd";
- reg = <0x4e300000 0x2000>;
- interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
- little-endian;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- ddr-pmu@4e300dc0 {
- compatible = "fsl,imx93-ddr-pmu";
- reg = <0x4e300dc0 0x200>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- dsi: dsi@4ae10000 {
- compatible = "fsl,imx93-mipi-dsi";
- reg = <0x4ae10000 0x4000>;
- interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_MIPI_TEST_BYTE>,
- <&clk IMX93_CLK_MIPI_DSI_GATE>,
- <&clk IMX93_CLK_MEDIA_DISP_PIX>;
- clock-names = "byte", "pclk", "pixel";
- assigned-clocks = <&clk IMX93_CLK_MIPI_TEST_BYTE>,
- <&clk IMX93_CLK_MEDIA_APB>;
- assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD0>,
- <&clk
IMX93_CLK_SYS_PLL_PFD1_DIV2>;
- assigned-clock-rates = <20000000>, <133333333>;
- phys = <&dphy>;
- phy-names = "dphy";
- power-domains = <&media_blk_ctrl
IMX93_MEDIABLK_PD_MIPI_DSI>;
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- dsi_to_lcdif: endpoint {
- remote-endpoint =
<&lcdif_to_dsi>;
- };
- };
-
- port@1 {
- reg = <1>;
- endpoint {
- };
- };
- };
- };
-
- lcdif: lcd-controller@4ae30000 {
- compatible = "fsl,imx93-lcdif";
- reg = <0x4ae30000 0x10000>;
- interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
- fsl,gpr = <&media_blk_ctrl>;
- clocks = <&clk IMX93_CLK_MEDIA_DISP_PIX>,
- <&clk IMX93_CLK_MEDIA_AXI>,
- <&clk IMX93_CLK_LCDIF_GATE>;
- clock-names = "pix", "disp-axi", "disp-apb";
- assigned-clocks = <&clk IMX93_CLK_VIDEO_PLL>,
- <&clk IMX93_CLK_MEDIA_DISP_PIX>,
- <&clk IMX93_CLK_MEDIA_AXI>,
- <&clk IMX93_CLK_MEDIA_APB>;
- assigned-clock-parents = <&clk IMX93_CLK_24M>,
- <&clk IMX93_CLK_VIDEO_PLL>,
- <&clk IMX93_CLK_SYS_PLL_PFD1>,
- <&clk
IMX93_CLK_SYS_PLL_PFD1_DIV2>;
- power-domains = <&media_blk_ctrl
IMX93_MEDIABLK_PD_LCDIF>;
- status = "disabled";
-
- lcdif_disp: port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- lcdif_to_dsi: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&dsi_to_lcdif>;
- };
-
- lcdif_to_ldb: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&ldb_ch0>;
- };
-
- lcdif_to_dpi: endpoint@2 {
- reg = <2>;
- remote-endpoint = <&dpi_to_lcdif>;
- };
- };
- };
-
- usbotg1: usb@4c100000 {
- compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
- reg = <0x4c100000 0x200>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
- <&clk IMX93_CLK_HSIO_32K_GATE>;
- clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk";
- assigned-clocks = <&clk IMX93_CLK_HSIO>;
- assigned-clock-parents = <&clk
IMX93_CLK_SYS_PLL_PFD1_DIV2>;
- assigned-clock-rates = <133000000>;
- fsl,usbphy = <&usbphynop1>;
- fsl,usbmisc = <&usbmisc1 0>;
status = "disabled";
};
- usbmisc1: usbmisc@4c100200 {
- compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
- #index-cells = <1>;
- reg = <0x4c100200 0x200>;
+ ddr-pmu@4e300dc0 {
+ compatible = "fsl,imx93-ddr-pmu";
+ reg = <0x4e300dc0 0x200>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
};
-
- usbotg2: usb@4c200000 {
- compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
- reg = <0x4c200000 0x200>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
- <&clk IMX93_CLK_HSIO_32K_GATE>;
- clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk";
- assigned-clocks = <&clk IMX93_CLK_HSIO>;
- assigned-clock-parents = <&clk
IMX93_CLK_SYS_PLL_PFD1_DIV2>;
- assigned-clock-rates = <133000000>;
- fsl,usbphy = <&usbphynop2>;
- fsl,usbmisc = <&usbmisc2 0>;
- status = "disabled";
- };
-
- usbmisc2: usbmisc@4c200200 {
- compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
- #index-cells = <1>;
- reg = <0x4c200200 0x200>;
- };
-
- ddrmix_blk_ctrl: blk-ctrl@4e010000 {
- compatible = "nxp,blk-ctrl-ddrmix", "syscon",
"simple-mfd";
- reg = <0x4e010000 0x1000>;
- };
- };
-
- display-subsystem {
- compatible = "fsl,imx-display-subsystem";
- ports = <&lcdif_disp>;
- };
-
- mqs1: mqs1 {
- compatible = "fsl,imx93-mqs";
- gpr = <&aonmix_ns_gpr>;
- status = "disabled";
- };
-
- mqs2: mqs2 {
- compatible = "fsl,imx93-mqs";
- gpr = <&wakeupmix_gpr>;
- status = "disabled";
- };
-
- ldb: ldb-display-controller {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx93-ldb";
- clocks = <&clk IMX93_CLK_LVDS_GATE>;
- clock-names = "ldb";
- assigned-clocks = <&clk IMX93_CLK_MEDIA_LDB>;
- assigned-clock-parents = <&clk IMX93_CLK_VIDEO_PLL>;
- gpr = <&media_blk_ctrl>;
- power-domains = <&mediamix>;
- status = "disabled";
-
- lvds-channel@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- phys = <&ldb_phy1>;
- phy-names = "ldb_phy";
- status = "disabled";
-
- port@0 {
- reg = <0>;
-
- ldb_ch0: endpoint {
- remote-endpoint = <&lcdif_to_ldb>;
- };
- };
-
- port@1 {
- reg = <1>;
- endpoint {
- };
- };
- };
- };
-
- ldb_phy: ldb-phy {
- compatible = "fsl,imx93-lvds-phy";
- #address-cells = <1>;
- #size-cells = <0>;
- gpr = <&media_blk_ctrl>;
- clocks = <&clk IMX93_CLK_MEDIA_APB>;
- clock-names = "apb";
- power-domains = <&mediamix>;
- status = "disabled";
-
- ldb_phy1: port@0 {
- reg = <0>;
- #phy-cells = <0>;
- };
- };
-
- lpm: imx93-lpm {
- compatible = "nxp,imx93-lpm";
- regmap = <&ddrmix_blk_ctrl>;
- clocks = <&clk IMX93_CLK_M33>, <&clk IMX93_CLK_WAKEUP_AXI>,
- <&clk IMX93_CLK_NIC_AXI>, <&clk IMX93_CLK_MEDIA_AXI>,
- <&clk IMX93_CLK_A55_PERIPH>, <&clk
IMX93_CLK_A55_CORE>, <&clk IMX93_CLK_ML>,
- <&clk IMX93_CLK_SYS_PLL_PFD0>, <&clk
IMX93_CLK_SYS_PLL_PFD0_DIV2>,
- <&clk IMX93_CLK_SYS_PLL_PFD1>, <&clk
IMX93_CLK_SYS_PLL_PFD1_DIV2>,
- <&clk IMX93_CLK_SYS_PLL_PFD2>, <&clk
IMX93_CLK_SYS_PLL_PFD2_DIV2>;
- clock-names = "m33_root", "wakeup_axi", "nic_axi", "media_axi",
"a55_periph",
- "a55_core", "ml_axi", "sys_pll_pfd0",
"sys_pll_pfd0_div2",
- "sys_pll_pfd1", "sys_pll_pfd1_div2",
"sys_pll_pfd2",
- "sys_pll_pfd2_div2";
- status = "disabled";
- };
-
- ele_fw2: se-fw2 {
- compatible = "fsl,imx93-se-fw";
- mbox-names = "tx", "rx";
- mboxes = <&s4muap 0 0>,
- <&s4muap 1 0>;
};
};
---
base-commit: c110f8602009470684a9a8dac43e450cc095cc40
change-id: 20240907-xilinx-69c228593ea2
Best regards,
--
Kevin Hao <haoke...@gmail.com>
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